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US4137542A
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Semiconductor structure
Assignee: International Business Machines Corp
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Filing: 1977-04-20
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Granted: 1979-01-30
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Expires: 1997-04-20
Abstract
Abstract A semiconductor structure may be fabricated that confines current flow to two dimensions by constructing as a structure a body of alternate regions of different semiconductor materials with current flow parallel to the intersections of the regions. The structure, in device form, exhibits the properties of selectable energy gap, higher carrier mobility and increased electronic density of states. Such devices are usable for their bulk properties, their junction electro-optical properties and their junction transistor properties.
Inventors
- 👤 Leroy L. Chang
- 👤 Leo Esaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:55
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/81; H10D62/815; H10D62/8161; H10D62/8162; H10D62/8164
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
84 words
A semiconductor device comprising in combination: a semiconductor body said body made up of alternating epitaxial planar regions of at least first and second semiconductor materials exhibiting a difference in semiconductor carrier barrier height at each interface of said planar regions; each of said planar regions having a thickness dimension less than the mean free path of an electron; and at least input and output means positioned for introducing current flow in the regions of said body parallel to the interfaces between said regions.
Claim 2
Dependent Claim
84 words
A semiconductor device comprising in combination: a semiconductor body said body made up of alternating epitaxial planar regions of at least first and second semiconductor materials exhibiting a difference in semiconductor carrier barrier height at each interface of said planar regions; each of said planar regions having a thickness dimension less than the mean free path of an electron; and at least input and output means positioned for introducing current flow in the regions of said body parallel to the interfaces between said regions.
Claim 3
Dependent Claim
29 words
The semiconductor device of claim 1 wherein said two semiconductor materials are taken from the following group of combinations and their alloys: GaAs-AlAs, GaSb-AlSb, InAs-GaSb, GaAs-ZnSe, GaSb-ZnTe and InSb-CdTe.
Claim 4
Dependent Claim
24 words
The semiconductor device of claim 2 wherein the thickness dimension of said first and said second planar regions is in the vicinity of 100A.
Claim 5
Dependent Claim
23 words
The semiconductor device of claim 2 wherein the thickness dimension of said first and second planar regions is in the vicinity of 100A.
Claim 6
Dependent Claim
51 words
The semiconductor device of claim 1 wherein said semiconductor body includes a portion of p-type conductivity in all planar regions and a portion of n-type conductivity in all planar regions joined at a p-n junction that traverses all planar regions and is positioned serially between said input and said output means.
Claim 7
Dependent Claim
51 words
The semiconductor device of claim 2 wherein said semiconductor body includes a portion of p-type conductivity in all planar regions and a portion of n-type conductivity in all planar regions joined at a p-n junction that traverses all planar regions and is positioned serially between said input and said output means.
Claim 8
Dependent Claim
69 words
The semiconductor device of claim 1 wherein said semiconductor body includes in each planar region first and second external and one internal portion of alternating conductivity type intersecting at two p-n junctions sufficiently proximate for transistor action; signal input means connected to said first external conductivity type portion; signal output means connected to said second external conductivity type portions, and signal means connected to said internal conductivity type portion.
Claim 9
Dependent Claim
69 words
The semiconductor device of claim 2 wherein said semiconductor body includes in each planar region first and second external and one internal portion of alternating conductivity type intersecting at two p-n junctions sufficiently proximate for transistor action; signal input means connected to said first external conductivity type portion; signal output means connected to said second external conductivity type portions, and signal means connected to said internal conductivity type portion.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-29 | 1982-07-31 | 1983-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-29 | 1986-07-31 | 1987-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-29 | 1990-07-31 | 1991-01-30 | $7700.00 | Window Closed / Lapsed |