Patent US5274874A successfully refreshed from Google Patents.
US4137525A
Expired / Lapsed
US
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Signal converter
Assignee: Individual
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Filing: 1976-01-05
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Granted: 1979-01-30
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Expires: 1996-01-05
Abstract
Abstract Binary input data or analog voltages are processed in parallel paths to form a bi-level (coarse and fine) output. A binary input is parallel processed to produce an analog current output and an analog input is parallel processed to produce a binary coded output. For binary-to-analog conversion, analog multiplexing and scaling adjusts the fine current to the coarse current prior to summing into a composite analog output. An analog input is continuously available to a comparator that senses voltage levels and reference voltages to provide binary coded linear scale pulses for parallel processing into fine increments of a binary output and coarse increments of a binary output combined into a total binary coded output.
Inventors
- 👤 Sylvan F. Tyrrel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 20:38
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/1205; H03M1/121; H03M1/1215
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
241 words
An analog-to-digital converter, comprising in combination: a first linear isolation amplifier having an analog input signal applied thereto; a first linear scale comparator connected to the output of said first isolation amplifier and generating a binary coded linear scale output varying with the analog input signal, said linear scale comparator including: a plurality of flip-flops, a voltage ladder network generating voltages at different levels in number equal to said flip-flops, and a plurality of amplifier means in number equal to the number of said flip-flops, said amplifier means having individual outputs connected to one of said flip-flops and one input responsive to a voltage of said ladder and a second input responsive to the analog input signal from said first isolation amplifier; means responsive to the output of said first comparator and a time delayed value of the analog input signal for generating a difference analog voltage; a second linear isolation amplifier having the difference analog voltage applied to an input; a second linear scale comparator connected to the output of said second isolation amplifier and generating a binary coded linear scale output varying with the difference voltage; a first linear scale to binary translator responsive to the output of said first comparator and generating the most significant bits of a binary coded output; and a second linear scale to binary translator responsive to the output of said second comparator and generating the least significant bits of a binary coded output.
Claim 2
Dependent Claim
241 words
An analog-to-digital converter, comprising in combination: a first linear isolation amplifier having an analog input signal applied thereto; a first linear scale comparator connected to the output of said first isolation amplifier and generating a binary coded linear scale output varying with the analog input signal, said linear scale comparator including: a plurality of flip-flops, a voltage ladder network generating voltages at different levels in number equal to said flip-flops, and a plurality of amplifier means in number equal to the number of said flip-flops, said amplifier means having individual outputs connected to one of said flip-flops and one input responsive to a voltage of said ladder and a second input responsive to the analog input signal from said first isolation amplifier; means responsive to the output of said first comparator and a time delayed value of the analog input signal for generating a difference analog voltage; a second linear isolation amplifier having the difference analog voltage applied to an input; a second linear scale comparator connected to the output of said second isolation amplifier and generating a binary coded linear scale output varying with the difference voltage; a first linear scale to binary translator responsive to the output of said first comparator and generating the most significant bits of a binary coded output; and a second linear scale to binary translator responsive to the output of said second comparator and generating the least significant bits of a binary coded output.
Claim 3
Dependent Claim
87 words
An analog-to-digital converter as set forth in claim 1 wherein said second linear scale comparator comprises: a plurality of flip-flops; a voltage ladder network generating voltages at different levels in number equal to said flip-flops; and a plurality of amplifier means in number equal to the number of said flip-flops, said amplifier means having individual outputs connected to one of said flip-flops and one input responsive to a voltage of said ladder and a second input responsive to the analog input signal from said second isolation amplifier.
Claim 4
Dependent Claim
63 words
An analog-to-digital converter as set forth in claim 1 including storage means connected to the output of the first linear scale to binary translator for storing the most significant bits of the binary coded output synchronized to the LSBs and responsive to a clock pulse, and means for providing clock pulses to said storage pg,39 means and to said first linear scale comparator.
Claim 5
Dependent Claim
269 words
An analog-to-digital converter, comprising in combination: a first linear isolation amplifier having an analog input signal applied thereto; a first linear scale comparator connected to the output of said first isolation amplifier and generating a binary coded linear scale output varying with the analog input signal, said linear scale comparator including: a plurality of flip-flops, a voltage ladder network generating voltages at different levels in number equal to said flip-flops, and a plurality of amplifier means in number equal to the number of said flip-flops, said amplifier means having individual outputs connected to one of said flip-flops and one input responsive to a voltage of said ladder and a second input responsive to the analog input signal from said isolation amplifier; a linear scale current switch responsive to the binary output of said first linear scale current comparator to convert the binary coded output into a corresponding analog current output; means responsive to the output of said current switch and a time delayed value of the analog input signal for generating a difference analog voltage; a second linear isolation amplifier having the difference analog voltage applied to an input; a second linear scale comparator connected to the output of said second isolation amplifier and generating a binary coded linear scale output varying with the difference voltage; a first linear scale to binary translator responsive to the output of said first comparator and generating the most significant bits of a binary coded output; and a second linear scale to binary translator responsive to the output of said second comparator and generating the least significant bits of a binary coded output.
Claim 6
Dependent Claim
269 words
An analog-to-digital converter, comprising in combination: a first linear isolation amplifier having an analog input signal applied thereto; a first linear scale comparator connected to the output of said first isolation amplifier and generating a binary coded linear scale output varying with the analog input signal, said linear scale comparator including: a plurality of flip-flops, a voltage ladder network generating voltages at different levels in number equal to said flip-flops, and a plurality of amplifier means in number equal to the number of said flip-flops, said amplifier means having individual outputs connected to one of said flip-flops and one input responsive to a voltage of said ladder and a second input responsive to the analog input signal from said isolation amplifier; a linear scale current switch responsive to the binary output of said first linear scale current comparator to convert the binary coded output into a corresponding analog current output; means responsive to the output of said current switch and a time delayed value of the analog input signal for generating a difference analog voltage; a second linear isolation amplifier having the difference analog voltage applied to an input; a second linear scale comparator connected to the output of said second isolation amplifier and generating a binary coded linear scale output varying with the difference voltage; a first linear scale to binary translator responsive to the output of said first comparator and generating the most significant bits of a binary coded output; and a second linear scale to binary translator responsive to the output of said second comparator and generating the least significant bits of a binary coded output.
Claim 7
Dependent Claim
76 words
An analog-to-digital converter as set forth in claim 4 wherein said second linear scale comparator comprises: a plurality of flip-flops; a voltage ladder network generating voltages at different levels in number equal to said flip-flops; and a plurality of amplifier means having individual outputs connected to one of said flip-flops and one output responsive to a voltage of said ladder network and a second input responsive to the analog input signal from said second isolation amplifier.
Claim 8
Dependent Claim
56 words
An analog-to-digital converter as set forth in claim 4 wherein said means for generating the difference analog voltage includes: a linear differential amplifier having one input connected to said current switch and a second input connected to the time delayed value of the analog input signal and generating at an output terminal the difference analog voltage.
References Cited (Backward Citations)
US3217147A
Cited
US3710377A
Cited
US3646548A
Cited
US3721975A
Cited
US3789389A
Cited
US3829853A
Cited
US3935569A
Cited
US3846786A
Cited
US3891984A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-29 | 1982-07-31 | 1983-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-29 | 1986-07-31 | 1987-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-29 | 1990-07-31 | 1991-01-30 | $7700.00 | Window Closed / Lapsed |