US3646548A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Nonlinear analog-to-digital converter
Assignee: Raytheon Co
•
Filing: 1971-01-15
•
Granted: 1972-02-29
•
Expires: 1991-01-15
Abstract
Abstract A high speed nonlinear analog-to-digital converter for producing a nonlinear or logarithmic transfer function which utilizes a parallel bank of nonlinear comparators and a parallel bank of linear comparators. The effective gain of the linear comparators is varied depending upon the portion of the logarithmic scale selected by the nonlinear comparators. This variation in gain is accomplished by changing the reference voltage of the linear comparators to coincide with the region of the input range in which the signal lies. The data flow through the converter is timed such that the nonlinear comparators are working on a second sample while the linear comparators are working on the first sample. All data from a complete sample arrives at the output terminals simultaneously.
Inventors
- 👤 Arnold H Van Doren
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 06:43
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/40; H03M1/46; H03M1/66; H03M1/74; H03M1/78; H03M1/785
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
135 words
A nonlinear analog-to-digital converter for converting an analog input voltage into a digital output signal, said converter comprising: an input voltage source; a plurality of parallel-connected, nonlinearly weighted means fed by said source for determining the portion of the nonlinear scale in which the input voltage lies; a plurality of parallel-connected, linearly weighted means fed by a signal derived at least in part from said source through signal delay means for dividing the selected portion of the nonlinear scale into substantially straight line segments; and means connected to said linearly weighted means for varying the weighting of said linearly weighted means as a function of the input voltage, said linearly weighted means operating on a first sample of said input voltage while said nonlinearly weighted means operates on a subsequent sample of said input voltage.
Claim 2
Dependent Claim
135 words
A nonlinear analog-to-digital converter for converting an analog input voltage into a digital output signal, said converter comprising: an input voltage source; a plurality of parallel-connected, nonlinearly weighted means fed by said source for determining the portion of the nonlinear scale in which the input voltage lies; a plurality of parallel-connected, linearly weighted means fed by a signal derived at least in part from said source through signal delay means for dividing the selected portion of the nonlinear scale into substantially straight line segments; and means connected to said linearly weighted means for varying the weighting of said linearly weighted means as a function of the input voltage, said linearly weighted means operating on a first sample of said input voltage while said nonlinearly weighted means operates on a subsequent sample of said input voltage.
Claim 3
Dependent Claim
81 words
In combination: an analog input voltage source; a plurality of nonlinearly weighted comparator means fed by said source; a plurality of linearly weighted comparator means fed by a voltage derived in part from said source and in part from the output of said nonlinearly weighted comparator means; and means fed by the output of said nonlinearly weighted comparator means for varying the weighting of said linearly weighted comparator means as a function of the output of said nonlinearly weighted comparator means.
Claim 4
Dependent Claim
81 words
In combination: an analog input voltage source; a plurality of nonlinearly weighted comparator means fed by said source; a plurality of linearly weighted comparator means fed by a voltage derived in part from said source and in part from the output of said nonlinearly weighted comparator means; and means fed by the output of said nonlinearly weighted comparator means for varying the weighting of said linearly weighted comparator means as a function of the output of said nonlinearly weighted comparator means.
Claim 5
Dependent Claim
22 words
The combination in accordance with claim 2 wherein said nonlinearly varying comparator means are fed in parallel from said analog voltage source.
Claim 6
Dependent Claim
36 words
The combination in accordance with claim 3 wherein said linearly weighted comparator means are fed in parallel by said signal derived from said analog input voltage source and the output of said nonlinearly weighted comparator means.
Claim 7
Dependent Claim
40 words
The combination in accordance with claim 2 wherein said linearly weighted comparator means are fed by a signal derived from said analog input voltage source through time delay means and an output voltage derived from said nonlinearly weighted comparator means.
Claim 8
Dependent Claim
88 words
In combination: a source of input signal samples of an analog voltage; a first plurality of nonlinearly weighted comparator means fed by said source; a second plurality of weighted comparator means fed by a signal derived in part from said source and in part from said nonlinearly weighted comparator means; and means supplying said second plurality of comparator means with a varying reference voltage for varying the weighting of said second plurality of weighted comparator means as a function of the output of said nonlinearly weighted comparator means.
Claim 9
Dependent Claim
88 words
In combination: a source of input signal samples of an analog voltage; a first plurality of nonlinearly weighted comparator means fed by said source; a second plurality of weighted comparator means fed by a signal derived in part from said source and in part from said nonlinearly weighted comparator means; and means supplying said second plurality of comparator means with a varying reference voltage for varying the weighting of said second plurality of weighted comparator means as a function of the output of said nonlinearly weighted comparator means.
Claim 10
Dependent Claim
43 words
The combination in accordance with claim 6 wherein said second plurality of weighted comparator means is fed by an analog signal sample is a function of the signal derived from said source minus the signal derived from the output of said comparator means.
Claim 11
Dependent Claim
53 words
The combination in accordance with claim 7 wherein the analog signal sample feeding said second plurality of comparator means is derived in part from a signal derived from said source through a time delay and in part from a signal derived from said first plurality of comparator means through a digital to-analog converter.
Claim 12
Dependent Claim
55 words
The combination in accordance with claim 8 wherein said second plurality of comparator means is fed by an algebraic summer fed by a signal derived from said source through a delay means and by a signal derivEd from the output of said first plurality of comparator means through a binary encoder and a digital-to-analog converter.
Claim 13
Dependent Claim
18 words
The combination in accordance with claim 9 wherein said second plurality of comparator means are substantially linearly weighted.
Claim 14
Dependent Claim
22 words
The combination in accordance with claim 10 wherein said first plurality of comparator means is fed by a fixed comparator reference signal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-28 | 1975-08-30 | 1976-02-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-28 | 1979-08-30 | 1980-02-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-28 | 1983-08-30 | 1984-02-29 | $7700.00 | Window Closed / Lapsed |