Adjustable timing electronic internal combustion engine ignition swit system

Claim 1

Adjustable timing injection system for an internal combustion engine having means (10, 100, 101, 102) generating a plurality of signals representative of instantaneous angular position of the crankshaft of the engine; timing means (17) receiving said plurality of signals and generating speed signals containing information regarding the speed of operation of the engine; means (10, 100, 103, 104) generating an angle marker signal containing information regarding the angular position of the crankshaft of the engine with respect to a reference position (UDC); an ignition coil (51) and at least one spark gap (52) connected to the secondary thereof to provide a spark at a predetermined ignition instant with respect to said reference position; a controlled switch (50) connected in the primary circuit of the ignition coil (51) which, upon change of state, controls generation of an ignition event and hence a spark at the spark gap (52); and means changing the iming of said ignition event with respect to the reference position comprising a first counter stage (12) and a second counter stage (15), the counter stages (12, 15) having a count capacity which is less than the number of signals developed by said instantaneous position signal generator means (10, 100, 101, 102) for any one ignition event after generation of said marker pulse, and said counters being automatically resettable upon reaching a predetermined count state so that, for any one ignition event, at least one counter stage will count through sequential count cycles; first logic means (11) connected to the input of said first counter stage (12), the speed signal being connected through the first logic means (11), to the first counter stage (12) to cause the first counter stage to count and provide a digital output representative of the speed of the engine; second logic means (14, 18) connected to the input of said second counter stage (15), count control means (21, 23; 24, 22, 20) connected to said second logic means (14, 18) and controlling the connection of said second counter stage (15) to the instantaneous signal generator means (10, 100, 101, 102) to control the counting sequence of said second counter stage (15) by the instantaneous angle position signal being counted thereby, and to connect the plurality of instantaneous angle position signals through the second logic means (14, 18) to the second counter stage (15) to cause the second counter stage to count through sequential count cycles after occurrence of said marker signal; a memory stage (28) connected to the outputs of both said counter stages (12, 15) and having an output connected to control the controlled swith (50); connection means (13) connecting the first counter stage (12) and said memory or storage stage (28), the memory stage storing the count output of the first counter stage (12) during a first count cycle thereof and providing an output signal to the controlled switch (50) when, during a subsequent count cycle, the input from the second counter stage (15) has reached a predetermined relation to the count stored in the multiplex or memory stage; and blocking means (19) connected to one of the counter stages (15) and to the memory stage (28) and inhibiting output of the memory stage (28) during the first count cycle of the respective counter means and while the count from the first counter stage (12) is being stored in the memory stage (28).