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Patent US4113512A successfully refreshed from Google Patents.
US4113512A
Expired / Lapsed
US
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Technique for preventing forward biased epi-isolation degradation
Assignee: International Business Machines Corp
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Filing: 1976-10-28
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Granted: 1978-09-12
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Expires: 1996-10-28
Abstract
Abstract Certain types of silicon integrated circuits are embodied as having diffused isolation regions surrounding epitaxial regions. Although normally operated in a reverse bias mode, such regions may become forward biased when sourcing current for certain circuit applications. Certain types of ionized impurities lodged in the isolation region can then migrate into the depletion region and the epitaxial region of the device during a forward bias condition. Such contaminants can be expected to produce generation-recombination centers in the depletion layer of the device which, when the isolation region is then reverse biased, will produce significant increases in junction leakage current. The magnitude of this reverse bias leakage current will depend upon both the contaminant concentration and the width of the depletion region.
Inventors
- 👤 Robert Lee Ayers
- 👤 Raymond Weaver Hamaker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:11
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/105; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
106 words
A method of fabricating a semiconductor device so as to prevent forward biased epitaxial isolation junction degradation, comprising the steps of: forming an isolation region of a first conductivity type having a width in a lateral direction and a first concentration in an epitaxial layer of a second conductivity type; forming a guard ring of said first conductivity type having a second concentration less than said first concentration surrounding and contiguous with said isolation region extending beyond said isolation region in said lateral direction to prevent diffusion of ionic contaminants from said isolation region when the isolation region is forward biased relative to said epitaxial layer.
Claim 2
Independent Claim
106 words
A method of fabricating a semiconductor device so as to prevent forward biased epitaxial isolation junction degradation, comprising the steps of: forming an isolation region of a first conductivity type having a width in a lateral direction and a first concentration in an epitaxial layer of a second conductivity type; forming a guard ring of said first conductivity type having a second concentration less than said first concentration surrounding and contiguous with said isolation region extending beyond said isolation region in said lateral direction to prevent diffusion of ionic contaminants from said isolation region when the isolation region is forward biased relative to said epitaxial layer.
Claim 3
Dependent Claim
21 words
The structure of claim 1, wherein said first conductivity type is n type and said second conductivity type is p type.
Claim 4
Dependent Claim
21 words
The structure of claim 1, wherein said first conductivity type is p type and said second conductivity type is n type.
Claim 5
Dependent Claim
31 words
The method of claim 1, wherein the isolation guard ring is formed at the same time as a base region is formed adjacent the isolation region, in a bipolar transistor process.
Claim 6
Dependent Claim
14 words
The method of claim 1, wherein the isolation guard ring is formed by ion-implantation.
Claim 7
Dependent Claim
15 words
The method of claim 1, wherein the isolation guard ring is formed by thermal diffusion.
Claim 8
Independent Claim
112 words
A method of fabricating a semiconductor device so as to prevent forward biased epitaxial isolation-junction degradation, comprising the steps of: forming an isolation region of a first conductivity type having a first width in a lateral direction and a first concentration in an epitaxial layer of a second conductivity type having a second concentration; forming a guard ring of said first conductivity type having a third concentration approximately midway between said first concentration and said second concentration, about said isolation region extending beyond said isolation region in said lateral direction to prevent diffusion of ionic contaminants from said isolation region when the isolation region is forward biased relative to said epitaxial layer.
Claim 9
Independent Claim
112 words
A method of fabricating a semiconductor device so as to prevent forward biased epitaxial isolation-junction degradation, comprising the steps of: forming an isolation region of a first conductivity type having a first width in a lateral direction and a first concentration in an epitaxial layer of a second conductivity type having a second concentration; forming a guard ring of said first conductivity type having a third concentration approximately midway between said first concentration and said second concentration, about said isolation region extending beyond said isolation region in said lateral direction to prevent diffusion of ionic contaminants from said isolation region when the isolation region is forward biased relative to said epitaxial layer.
Claim 10
Dependent Claim
20 words
The method of claim 7 wherein said first concentration is greater than 10 19 atoms per cubic centimeter of boron.
Claim 11
Dependent Claim
83 words
The method of claim 7, wherein said isolation region of said first conductivity type is formed of silicon doped with boron with said first concentration being greater than 10.sup. 19 atoms per cubic centimeter, said epitaxial layer being a silicon epitaxial layer doped with arsenic with said second concentration being approximately 10 15 atoms per cubic centimeter and said guard ring being formd of silicon doped with boron with said third concentration being approximately midway between said first concentration and said second concentration.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-09-11 | 1982-03-13 | 1982-09-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-09-11 | 1986-03-13 | 1986-09-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-09-11 | 1990-03-13 | 1990-09-12 | $7700.00 | Window Closed / Lapsed |