Ensemble and anharmonic generation in a polyphonic tone synthesizer

Claim 2

A musical instrument exhibiting an ensemble effect comprising; a first memory means for writing master data set to be thereafter read out, wherein number N designates the address of words in said first memory means, means to set contents of first memory means to zero values at start of a computation cycle, first means for computing number Y(N) in master data set during each computation cycle of a sequence of computation cycles for providing an emsemble effect, wherein said master data set is composed of a multiplicity R+1 of submaster data sets each containing numbers Z(N), X 1 (N), X 2 (N), . . . , X R (N) and such computing is in accordance with the relations ##EQU11## where q=1,2, . . . , W; N=1,2, . . . , 2W; W is the number of harmonic components defining said number Z(N) and c q is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth component of Z(N); p=1,2, . . . , R is an index designating the out-of-tune submaster data sets; M p is an integer not greater than W which specifies the number of harmonic components defining said numbers X p (N) and d pq is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth components; the numbers k p are phase constants selected from a set of phase constants; j is a number incremented repetitively; said first means comprising a memory storing said harmonic coefficient sets c q and d pq , a sinusoid table comprising a memory storing values of sin(πφ/W) for 0≦φ≦2W at intervals of D where D is a resolution constant, harmonic component evaluation circuitry utilizing said memory and said sinusoid table to calculate c q sin(πNq/W) for each of the W harmonic components of said number Z(N) in accordance with a selected value of N and to calculate d pq sin[πNq(1+jkp)/W] for each of the M p harmonic components of said numbers X p (N) in accordance with a selected value of N, means for successively algebraically summing output of said harmonic evaluation circuitry with contents of word N in said first memory means, second memory means for storing a master data set to be thereafter read out, second means responsive to first means for transferring said master data set from first memory means to said second memory means, means for converting a master data set to a musical waveshape, and third means responsive to said second means for repetitively reading out the words of said master data set from second memory means and providing said read out words to said means for converting, the musical waveshape so produced exhibiting an ensemble effect.

Claim 3

A musical instrument according to claim 1 wherein said harmonic component evaluation circuitry comprises; a word counter incremented at each computation time in said computation cycle wherein said word counter is modulo 2W, the contents of said word counter thereby represents said number N, modulo 2W reset circuitry whereby a reset signal is created when said word counter is reset when content N equals 2W, a harmonic counter incremented by said reset signal and containing said harmonic number q, and an adder-accumulator for adding successive values of content q of said harmonic counter wherein said adder-accumulator is cleared to zero by said reset signal, the contents of said adder-accumulator thereby representing number Nq.

Claim 4

A musical instrument according to claim 2 wherein said computation cycle comprises; a multiplicity R+1 of subcomputation cycles wherein during each subcomputation cycle said numbers Z(N) and X p (N) are evaluated according to said relations and furnished to said means for successively algebraically summing.

Claim 5

A musical instrument according to claim 3 wherein said harmonic counter further comprises modulo select circuitry whereby said harmonic counter is caused to count said reset signals modulo said number W during said subcomputation cycle during which said numbers Z(N) are evaluated and whereby said harmonic counter is caused to count said reset signals modulo said number M p during subcomputation cycle during which said corresponding numbers X p (N) are evaluated.

Claim 6

A musical instrument according to claim 4 wherein said harmonic component evaluation circuitry further comprises; a cycle counter which is incremented at the start of each said computation cycle wherein cycle counter is modulo 1/ k p where k p is the smallest of said set of phase constants, the contents of cycle counter thereby represents said number j, a first adder for summing the output resultant product jk p Nq from said scaler with number Nq contained in said adder-accumulator thereby evaluating arguments Nq(1+jk p ), a tone gate whereby for subcomputation cycle during which said numbers Z(N) are evaluated in accordance with said relation, the number in said scaler is inhibited as an input to said first adder; thereby said first adder evaluates argument, a first memory address decoder for addressing said sinusoid table in response to said arguments created by summing in said first adder, to access from sinusoid table a corresponding stored value sin[πNq(1+jk p )/W] for said subcomputation cycles during which said tone gate is not inhibited and to access from said sinusoid table a corresponding stored value sin (πNq/W) for said subcomputation cycle during which tone gate is inhibited, and a multiplier means for multiplying each such addressed term from said sinusoid table by said harmonic coefficient c q for the corresponding qth harmonic component during said subcomputation cycle during which said tone gate is inhibited and for multiplying each such addressed term from said sinusoid table by said harmonic coefficients d pq during said subcomputation cycles during which tone gate is not inhibited, the products of such multiplication being supplied to said means for successively algebraically summing.

Claim 7

A musical instrument according to claim 5 wherein said means for successively algebraically summing comprises; first memory addressing means responsive to number N in said word counter whereby contents addressed in said first memory means are read out, and an adder for algebraically summing said products supplied from said multiplier means and contents read out from said first memory means, the summed values being stored in said first memory means.

Claim 8

A musical instrument according to claim 5 wherein said scaler comprises; a first scaler circuitry comprising a multiplicity of binary shift registers each of which accepts said number Nq in binary and right shifts Nq by m binary positions to perform division Nq/2 m , wherein a different integer m is used by each member of said multiplicity of shift registers, and a multiplicity of adders summing all said divisions, a scaler division select means whereby contents of said cycle counter are caused to inhibit members of said multiplicity of binary shift registers thereby causing output of said multiplicity of adders to create number jNq, and a phase constant select circuitry whereby said number j is multiplied by an element number k p selected from said set of phase constants.

Claim 9

A musical instrument according to claim 7 wherein said phase constant select circuitry comprises; a binary shift register which accepts said value of j in binary and right shifts said value by u binary positions to obtain value j/2 u wherein such divisors 1/2 u correspond to members of said set of phase constants, and phase select means whereby circuitry is provided for selecting said numbers u of binary shift positions.

Claim 10

A musical instrument according to claim 7 wherein said phase constant select circuitry comprises a frequency offset memory storing different values of k p associated with different notes, and said third means also causing the value of k p associated with each selected note to be accessed from said frequency offset memory and supplied to said phase constant select circuitry.

Claim 11

A musical instrument according to claim 5 wherein said tone gate further comprises a fundamental inhibit circuitry responsive to said harmonic number q contained in said harmonic counter whereby during said computation cycles tone gate is caused to be inhibited for values of q equal to one, thereby causing said musical instrument to create musical tones having anharmonic overtones.

Claim 12

A musical instrument according to claim 10 wherein said scaler further comprises; an overtone offset memory storing different values of said phase constants k p associated with different values of said harmonic number q, an overtone addressing means whereby values of phase constants k p are caused to be read out of said overtone offset memory in response to values of said harmonic number q contained in said harmonic counter, scaler multiplication means whereby said number Nq contained in said adder-accumulator are multiplied by said number k p read from said overtone offset memory and whereby resultant product k p Nq is multiplied by said number j.

Claim 13

A musical instrument according to claim 2 wherein said harmonic component evaluation circuitry further comprises; a cycle counter which is incremented at the start of each said computation cycle wherein cycle counter is modulo 1/ k p , where k p is the smallest of said set of phase constants, the contents of cycle counter thereby represents said number j, a scaler whereby said number Nq contained in said adder-accumulator is multiplied by a number k p selected from said set of phase constants and whereby product k p Nq is multiplied by said number j, a first adder for summing the output resultant product jk p Nq from said scaler with number Nq contained in said adder-accumulator thereby evaluating arguments Nq(1+jk p ), a first memory addressing decoder for addressing said sinusoid table in response to argument Nq contained in said adder-accumulator, to access from said sinusoid table the corresponding stored value sin(πNq/W), a second sinusoid table comprising a memory storing values of sin(πφ/W) for 0≦φ≦2W at intervals of D where D is a resolution constant, a second memory addressing decoder for addressing said second sinusoid table in response to arguments created by summing in said first adder, to access from said second sinusoid table the corresponding value sin[πNq(1+jkp)/W] a second adder for summing the values sin(πNq/W) addressed from said first sinusoid table with the values sin]πNq(1+jk p )/W] addressed from said second sinusoid table, and a multiplier means for multiplying the sum terms from said second adder by the harmonic coefficient c q for the corresponding q th harmonic during said subcomputation cycle during which numbers Z(N) are computed and for multiplying said sum terms by the harmonic coefficients d pq during said subcomputation cycles during which numbers X p (N) are computed, the products of such multiplication being supplied to said means for successively algebraically summing thereby causing said musical instrument to create a doubled musical effect.

Claim 14

A musical instrument according to claim 12 wherein said harmonic component evaluation circuitry further comprises; a tone gate and control circuitry whereby said tone gate is caused to inhibit said resultant product jk p Nq from said first adder when said harmonic number q equals one, thereby causing said musical instrument to create combination of tones with anharmonic overtones and a doubled musical effect.

Claim 15

A musical instrument according to claim 2 wherein said harmonic component evaluation circuitry comprises; a cycle counter which is incremented at the start of each said computation cycle wherein cycle counter is modulo 1/ k p , where k p is the smallest of said set of phase constants, the contents of cycle counter thereby represents said number j, a multiplicity of scalers, equal to said number R, whereby each such scaler receives said number Nq contained in said adder-accumulator and multiplies Nq by a number k p selected from said set of phase constants and whereby each such resultant product k p Nq is multiplied by said number j, a multiplicity of scaler adders, equal to said number R, each such scaler adder associated with a corresponding member of said multiplicity of scalers and whereby each scaler adder sums the result product jk p Nqfrom its associated scaler with number Nq contained in said adder-accumulator thereby evaluating corresponding multiplicity of arguments Nq(1+jk p ), a first memory addressing decoder for addressing said sinusoid table in response to argument Nq contained in said adder-accumulator to access from said sinusoid table the corresponding stored value sin(πNq/W), a multiplicity R of auxiliary sinusoid tables each member of which comprises a memory storing values of sin(πφ/W) for 0≦φ≦2W at intervals of D where D is a resolution constant, a multiplicity R of auxiliary memory addressing decoders each member of which is associated with a corresponding member of said multiplicity of scaler adders whereby each auxiliary memory address decoder addresses a corresponding member of said multiplicity of auxiliary sinusoid tables to access the values sin[πNq(1+jk p )/W] associated with said arguments Nq(1+jk p ), a multiplicity R of multiplier means each member of which is associated with a corresponding member of said multiplicity of sinusoid tables whereby each multiplier means multiplies said accessed values sin[πNq(1+jk p )/W] by a harmonic coefficient d pq for the corresponding q th harmonic associated with each said multiplier, a multiplicity of multiplier adders whereby the product values from said multiplicity of multipliers are summed, a multiplier means for multiplying said value sin(πNq/W) addressed from said sinusoid table by the harmonic coefficient c q for the corresponding q th harmonic, and a third adder whereby output of said multiplier means is added to output from said multiplicity of multiplier adders and whereby the added value is supplied to said means for successively algebraically summing.

Claim 16

A musical instrument according to claim 5 further comprising stop change detector means whereby a change signal is generated when state of tone switches is altered.

Claim 17

A musical instrument according to claim 15 wherein said means for successively algebraically summing comprises; a second memory means for writing phased master data set to be thereafter read out, wherein said number N designates the address of words in second memory means, means to set contents of said second memory means to zero value at start of selected subcomputation cycle, a first and second memory addressing means responsive to number N in said word counter whereby during said computation cycle contents addressed in said first and second memories means are read out, a data gate whereby during first portion of computation cycle causes input data to be written in said first memory means and whereby during second portion of computation cycle causes said input data to be inhibited, an adder for algebraically summing said products supplied from said multiplier means and contents read out from said second memory means, the summed values being stored in said second memory means and said summed values are further furnished as said input data to said data gate, computation cycle control circuitry whereby said numbers Z(N), X 1 (N), . . . , X R (N) are caused to be computed during computation cycle when said change signal is generated and whereby said numbers X 1 (N), S 2 (N), . . . , X R (N) are computed when change signal is not generated, and said second means responsive to first means for transferring further comprising an adder which sums data read out from said first memory means by said first memory address decoder with data read out from said second memory means by said second memory addressing means.

Claim 18

A musical instrument exhibiting an ensemble effect comprising; a first memory means for writing master data set to be thereafter read out, wherein number N designates the address of words in said first memory means, means to set whereby contents of said first memory means are initialized to zero values at start of master subcomputation cycle, a second memory means for writing phased master data set to be thereafter read out, wherein contents are initialized to zero values at start of phase subcomputation cycle by said means to set, and wherein number H designates the address of words in said second memory means, first means for computing numbers Z(N) in said master data set in accordance with the relation ##EQU12## where q=1,2, . . . , W; N=1,2, . . . , 2W; W is the number of harmonic components defining said number Z(N) in master data set and c q is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth component of Z(N); and whereby numbers V(H) in said phased master data set are computed in accordance with the relations ##EQU13## where H=1,2, . . . , QN; p=1,2, . . . , R is an index designating the component numbers in phased master data set; M p is an integer which specifies the number of harmonic components defining said numbers X p (H); d pq is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth components; and Q is a phase resolution constant; said first means comprising a memory storing said harmonic coefficient sets c q and d pq , a sinusoid table comprising a memory storing values of sin(πφ/W) for 0≦φ≦2W at intervals of D where D is a resolution constant, harmonic component evaluation circuitry utilizing said memory and said sinusoid table to calculate c q sin(πNq/W) for each of the W harmonic components of said number Z(N) in accordance with a selected value of N and to calculate d pq sin(πHq/WQ) for each of the M p harmonic components of said numbers X p (H) in accordance with selected values of H and said resolution constant Q, means for successively algebraically summing output of said evaluation circuitry with contents of word N in said first memory means during said master subcomputation cycle and for successively algebraically summing output of said evaluation circuitry with contents of word H in said second memory means during said phase subcomputation cycle, third memory means for storing data to be thereafter read out, second means responsive to said first means for providing an ensemble effect by adding data read out from said first memory means with data read out from said second memory means and for transferring summed data to said third memory means, and means for converting said summed data to a musical waveshape, and third means responsive to said second means for repetitively reading out said summed data from said third memory means and providing said read out data to said means for converting, the musical waveshape so produced exhibiting an ensemble effect.

Claim 19

A musical instrument exhibiting an ensemble effect comprising; a first memory means for writing master data set to be thereafter read out, wherein number N designates the address of words in said first memory means, means to set whereby contents of said first memory means are initialized to zero values at start of master subcomputation cycle, a second memory means for writing phased master data set to be thereafter read out, wherein contents are initialized to zero values at start of phase subcomputation cycle by said means to set, and wherein number H designates the address of words in said second memory means, first means for computing numbers Z(N) in said master data set in accordance with the relation ##EQU12## where q=1,2, . . . , W; N=1,2, . . . , 2W; W is the number of harmonic components defining said number Z(N) in master data set and c q is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth component of Z(N); and whereby numbers V(H) in said phased master data set are computed in accordance with the relations ##EQU13## where H=1,2, . . . , QN; p=1,2, . . . , R is an index designating the component numbers in phased master data set; M p is an integer which specifies the number of harmonic components defining said numbers X p (H); d pq is the harmonic coefficient of the corresponding qth harmonic establishing the relative amplitude of the corresponding qth components; and Q is a phase resolution constant; said first means comprising a memory storing said harmonic coefficient sets c q and d pq , a sinusoid table comprising a memory storing values of sin(πφ/W) for 0≦φ≦2W at intervals of D where D is a resolution constant, harmonic component evaluation circuitry utilizing said memory and said sinusoid table to calculate c q sin(πNq/W) for each of the W harmonic components of said number Z(N) in accordance with a selected value of N and to calculate d pq sin(πHq/WQ) for each of the M p harmonic components of said numbers X p (H) in accordance with selected values of H and said resolution constant Q, means for successively algebraically summing output of said evaluation circuitry with contents of word N in said first memory means during said master subcomputation cycle and for successively algebraically summing output of said evaluation circuitry with contents of word H in said second memory means during said phase subcomputation cycle, third memory means for storing data to be thereafter read out, second means responsive to said first means for providing an ensemble effect by adding data read out from said first memory means with data read out from said second memory means and for transferring summed data to said third memory means, and means for converting said summed data to a musical waveshape, and third means responsive to said second means for repetitively reading out said summed data from said third memory means and providing said read out data to said means for converting, the musical waveshape so produced exhibiting an ensemble effect.

Claim 20

A musical instrument according to claim 17 wherein said harmonic component evaluation circuitry comprises; a word counter incremented at each computation time in said master subcomputation cycle wherein said word counter counts modulo 2W, the contents of word counter thereby represents said number N and said word counter is incremented at each computation time in said phase subcomputation cycle wherein said word counter is caused to count modulo 2QW and the contents of said word counter thereby represents said number H, modulo reset circuitry whereby a reset signal is created when said word counter is reset at its maximum count, a harmonic counter incremented by said reset signal wherein said harmonic counter is caused to count said reset signals modulo said number W during said master subcomputation cycle and is caused to count said reset signals modulo said number M p during the portion of said phase subcomputation cycle wherein said numbers X p (H) are computed; thereby the contents of said harmonic counter is said harmonic number q, an adder-accumulator for adding successive values of said harmonic number q contained in said harmonic counter wherein said adder-accumulator is initialized to zero value by said reset signal, thereby the content of said adder-accumulator is number Nq during said master subcomputation cycle and the content of said adder-accumulator is number Hq during said phase subcomputation cycle, a first memory address decoder for addressing said sinusoid table in response to number contained in said adder-accumulator whereby during said master subcomputation cycle the value sin(πNq/W) corresponding to said number Nq contained in said adder-accumulator is accessed from said sinusoid table and whereby during said phase subcomputation cycle the value sin(πHq/WQ) corresponding to said number Hq contained in said adder-accumulator is accessed from said sinusoid table, and a multiplier means for multiplying each such accessed value from said sinusoid table by said harmonic coefficient c q for the corresponding q th harmonic component during said master subcomputation cycle and for multiplying each such accessed value from said sinusoid table by said harmonic coefficients d pq during said phase subcomputation cycle, the product values created by said multiplier means are supplied to said means for successively algebraically summing.

Claim 21

A musical instrument according to claim 18 wherein said means for successively algebraically summing comprises; a first memory addressing means responsive to contents of said word counter whereby contents addressed in said first memory means are read out during said master subcomputation cycle, a second memory addressing means responsive to contents of said word counter whereby contents addressed in said second memory means are read out during said phase subcomputation cycle, and an adder means for algebraically summing said product values supplied from said multiplier means with contents read out from said first memory means the summed values being stored in said first memory means, and for algebraically summing said product values supplied from said multiplier means with contents read out from said second memory means the summed values being stored in said second memory means.

Claim 22

A musical instrument according to claim 19 wherein said second means comprises; a cycle counter which is incremented repetitively and is caused to count modulo number 2WQ, whereby the contents of said cycle counter is a phase constant number h, said second memory addressing means further comprising circuitry for producing phase shifted data points whereby during data transfer cycle data is caused to be accessed from said second memory means for the sequence of N word addresses h, h+Q, h+2Q, h+3Q, . . . , h+(N-1)Q; the elements of said sequence of word addresses being numbers modulo QN, and a data adder whereby data accessed from said second memory means in response to said second memory addressing means during said data transfer cycle is algebraically summed with data accessed from said first memory means by said first memory addressing means in response to content of said word counter and whereby said algebraically summed data is transferred to said third memory means.

Claim 23

A musical instrument according to claim 17 further comprising a stop change detector means whereby a change signal is generated when state of tone switches is altered.

Claim 24

A musical instrument according to claim 21 comprising computation control circuitry whereby in response to said change signal a computation cycle is initiated comprising said master subcomputation cycle and said phase subcomputation cycle and whereby if said change signal is not generated a computation cycle is initiated comprising said phase subcomputation cycle.