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Patent US4095186A successfully refreshed from Google Patents.
US4095186A
Expired / Lapsed
US
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Variable phase shifter
Assignee: Honeywell Inc
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Filing: 1976-12-07
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Granted: 1978-06-13
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Expires: 1996-12-07
Abstract
Abstract A variable phase shifter and comparator useable, for example, in a scalloping suppression system within a V.H.F. Omni Range (VOR) aircraft bearing determining system. The digital phase shifter-comparator network is employed to cause a phase of the reference signal to follow a phase of the variable phase signal. The phase shifter is comprised of two counters and the phase comparator is comprised of a bistable multivibrator. The delayed reference signal is the output of the system, and an analog rate controller is employed to limit the rate at which the reference signal can follow the variable phase signal.
Inventors
- 👤 Andrew M. Vesel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:29
CPC Classifications
G; G01; G01S; G01S1/00; G01S1/02; G01S1/08; G01S1/44; G01S1/46; G01S1/50
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
147 words
A variable phase digital phase shifter for shifting the phase of an input signal comprising: storage means for storing a signal indicative of the amount by which the phase of the input signal is to be shifted; a source of clock pulses; a first input signal terminal; counting means connected to said first input signal terminal, to said storage means and to said clock pulse source and responsive to receipt of an input signal at said first input signal terminal for counting a number of pulses, from said clock pulse source, determined by the signal stored in said storage means; output means coupled to said counting means for generating an output signal when said counting means has counted said number of pulses; and adjusting means for adjusting the signal stored in said storage means to adjust the phase difference between the output signal and the input signal.
Claim 2
Dependent Claim
147 words
A variable phase digital phase shifter for shifting the phase of an input signal comprising: storage means for storing a signal indicative of the amount by which the phase of the input signal is to be shifted; a source of clock pulses; a first input signal terminal; counting means connected to said first input signal terminal, to said storage means and to said clock pulse source and responsive to receipt of an input signal at said first input signal terminal for counting a number of pulses, from said clock pulse source, determined by the signal stored in said storage means; output means coupled to said counting means for generating an output signal when said counting means has counted said number of pulses; and adjusting means for adjusting the signal stored in said storage means to adjust the phase difference between the output signal and the input signal.
Claim 3
Dependent Claim
155 words
A phase shifter as claimed in claim 1 in which said adjusting means comprises: a second terminal for receiving signals indicative of the point to which the phase of the input signal is to be shifted; switching means connected to said output means and to said second terminal and adapted to assume a first state upon receipt of a signal at said second terminal and a second state upon generation of an output signal; and gating means coupled to said switching means, to said output means and to said storage means for adjusting the signal stored in said storage means to decrease the amount of phase shift indicated by that stored signal when the output signal is generated while said switching means is in its first state and to increase the amount of phase shift indicated by the stored signal when the output signal is generated while said switching means is in its second state.
Claim 4
Dependent Claim
82 words
A phase shifter as claimed in claim 2 in which said storage means comprises an up-down counter and said gating means is connected to the up and down inputs of said up-down counter to decrease the number stored in said up-down counter when the output signal is generated while said switching means is in its first state and to increase the number stored in said up-down counter when the output signal is generated while said switching means is in its second state.
Claim 5
Dependent Claim
34 words
A phase shifter as claimed in claim 3 in which said counting means comprises a binary counter for counting down from the number of pulses determined by the signal stored in said storage means.
Claim 6
Dependent Claim
54 words
A phase shifter as claimed in claim 4 in which the stages of said the up-down counter are connected in parallel with the stages of said binary counter to parallel load the number stored in said up-down counter into said binary counter upon receipt of an input signal at said first input signal terminal.
Claim 7
Dependent Claim
46 words
A phase shifter as claimed in claim 1 in which said storage means comprises an up-down counter and said adjusting means is connected to the up and down inputs of said up-down counter to incrementally change the number stored therein by counting up or counting down.
Claim 8
Dependent Claim
34 words
A phase shifter as claimed in claim 1 in which said counting means comprises a binary counter for counting down from the number of pulses determined by the signal stored in said storage means.
Claim 9
Dependent Claim
41 words
A phase shifter as claimed in claim 1 in which said first input signal terminal receives input pulse signals and in which said output means includes means for generating output pulse signals having the same duration as the input pulse signals.
Claim 10
Dependent Claim
148 words
A variable phase shift digital phase shifter for shifting the phase of an input signal comprising: an up-down digital counter; a second digital counter; means connecting the stages of said up-down digital counter in parallel with the stages of said second digital counter; input means connected to said second digital counter and responsive to receipt of an input signal for parallel loading a number stored in said up-down digital counter into said second digital counter, while retaining the number in said up-down digital counter, and starting said second digital counter counting downward; output means connected to said second digital counter for generating a phase shifted output signal when said second digital counter has counted downward from the number to zero; and control means connected to the up and down inputs of said up-down digital counter to incrementally change the number stored therein by counting up or counting down.
Claim 11
Dependent Claim
148 words
A variable phase shift digital phase shifter for shifting the phase of an input signal comprising: an up-down digital counter; a second digital counter; means connecting the stages of said up-down digital counter in parallel with the stages of said second digital counter; input means connected to said second digital counter and responsive to receipt of an input signal for parallel loading a number stored in said up-down digital counter into said second digital counter, while retaining the number in said up-down digital counter, and starting said second digital counter counting downward; output means connected to said second digital counter for generating a phase shifted output signal when said second digital counter has counted downward from the number to zero; and control means connected to the up and down inputs of said up-down digital counter to incrementally change the number stored therein by counting up or counting down.
Claim 12
Dependent Claim
23 words
A phase shifter as claimed in claim 9 further comprising clock means for applying clock pulses to down count said second digital counter.
Claim 13
Dependent Claim
135 words
A phase comparator for comparing the phases of two signals comprising: first input means for receiving a first input signal; second input means for receiving a second input signal; switching means connected to said first and second input means and adapted to assume a first state upon receipt of the first input signal at said first input means and to assume a second state upon receipt of the second input signal at said second input means; and gating means connected to said switching means and to said second input means for generating a first phase comparison signal upon receipt of the second input signal while said switching means is in its first state and a second phase comparison signal upon receipt of the second input signal while said switching means is in its second state.
Claim 14
Dependent Claim
135 words
A phase comparator for comparing the phases of two signals comprising: first input means for receiving a first input signal; second input means for receiving a second input signal; switching means connected to said first and second input means and adapted to assume a first state upon receipt of the first input signal at said first input means and to assume a second state upon receipt of the second input signal at said second input means; and gating means connected to said switching means and to said second input means for generating a first phase comparison signal upon receipt of the second input signal while said switching means is in its first state and a second phase comparison signal upon receipt of the second input signal while said switching means is in its second state.
Claim 15
Dependent Claim
44 words
A phase comparator as claimed in claim 11 in which said switching means comprises a clocked multivibrator having said first input means connected to one of the set and reset inputs thereof and having said second input means connected to the clock input thereof.
Claim 16
Dependent Claim
222 words
A phase comparison and following system for causing the phase of a second signal to follow the phase of a first signal comprising: first input means for receiving a first input signal; second input means for receiving a second input signal; switching means connected to said first and second input means and adapted to assume a first state upon receipt of the first input signal at said first input means and to assume a second state upon receipt of the second input signal at said second input means; gating means connected to said switching means and to said second input means for generating a first phase comparison signal upon receipt of the second input signal while said switching means is in its first state and a second phase comparison signal upon receipt of the second input signal while said switching means is in its second state; and control means connected to said gating means for adjusting the phase of one of said first and second input signals to decrease the delay of the phase of said second input signal with respect to said first input signal in response to a first phase comparison signal and to increase the delay of the phase of said second input signal with respect to said first input signal in response to a second phase comparison signal.
Claim 17
Dependent Claim
222 words
A phase comparison and following system for causing the phase of a second signal to follow the phase of a first signal comprising: first input means for receiving a first input signal; second input means for receiving a second input signal; switching means connected to said first and second input means and adapted to assume a first state upon receipt of the first input signal at said first input means and to assume a second state upon receipt of the second input signal at said second input means; gating means connected to said switching means and to said second input means for generating a first phase comparison signal upon receipt of the second input signal while said switching means is in its first state and a second phase comparison signal upon receipt of the second input signal while said switching means is in its second state; and control means connected to said gating means for adjusting the phase of one of said first and second input signals to decrease the delay of the phase of said second input signal with respect to said first input signal in response to a first phase comparison signal and to increase the delay of the phase of said second input signal with respect to said first input signal in response to a second phase comparison signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-12 | 1981-12-12 | 1982-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-12 | 1985-12-12 | 1986-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-12 | 1989-12-12 | 1990-06-13 | $7700.00 | Window Closed / Lapsed |