US3663956A
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Digital phase measurement computation circuit
Assignee: Fathom Oceanology Ltd
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Filing: 1970-07-01
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Granted: 1972-05-16
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Expires: 1990-07-01
Abstract
Abstract Circuitry for accurately measuring the phase angle between two sinusoidal signals is disclosed. The two sinusoidal signals are squared by separate axis or zero crossing detectors. The two squared signals are further processed to obtain a first pulse T, the duration of which is equal to the period of the signals under test and a second signal Delta t, the duration of which is equal to the time difference between the two signals under test. The T and Delta t pulses are used to gate a high frequency clock and the resulting clock pulses, or counts, are incremented into two binary counters (a T counter and a Delta t counter). Thus, a number proportional to the period T of the signals under test (T count) is stored in the T counter and a number proportional to the time difference between the two signals under test ( Delta t count) is stored in the Delta t counter. The T and Delta t counts are preset into respective binary programmable dividers. The programmable dividers have the property of dividing the frequency of an input clock (fc) by the preset number. Thus, the output of one divider is fc/T and the output of the other counter is fc/ Delta t. The fc/T count is fed into a binary to decimal counter and the fc/ Delta t count is fed into a binary counter. Both counters are disabled when 3,600 fc/ Delta t clock pulses have been counted in the binary counter. The number stored in the binary to decimal counter is the phase angle in tenths of a degree since the following computation has been performed: theta Delta t/T X 3,600. A decimal display device is connected to the output of the binary coded decimal counter to provide a visual display of the phase angle reading.
Inventors
- 👤 Bruce W Purdy
- 👤 Donato Perti
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 15:22
CPC Classifications
G; G01; G01R; G01R25/00; H; H03; H03M; H03M1/00; H03M1/12; H03M1/50
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
175 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two ac signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said ac signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; a pulse source, means responsive to said pulse T to divide pulses from said pulse source by the duration of said pulse T, and means responsive to said pulse Delta t to divide pulses from said pulse source by the duration of said pulse Delta t and at a predetermined result to terminate said division responsive to pulse T so that the result of said division responsive to pulse T represents the computation of the phase angle between said two ac signals.
Claim 2
Dependent Claim
175 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two ac signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said ac signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; a pulse source, means responsive to said pulse T to divide pulses from said pulse source by the duration of said pulse T, and means responsive to said pulse Delta t to divide pulses from said pulse source by the duration of said pulse Delta t and at a predetermined result to terminate said division responsive to pulse T so that the result of said division responsive to pulse T represents the computation of the phase angle between said two ac signals.
Claim 3
Dependent Claim
20 words
A phase meter as defined in claim 1 wherein said first and second squaring means are zero axis crossing detectors.
Claim 4
Dependent Claim
24 words
A phase meter as defined in claim 2 wherein said means to derive said pulse T includes first and second serially connected flip-flop circuits.
Claim 5
Dependent Claim
59 words
A phase meter as defined in claim 3 wherein said means to derive said pulse Delta t includes a third flip-flop circuit having an input coupled to said first squaring means and a fourth flip-flop circuit having a first input connected to the output of said third flip-flop circuit and a second input coupled to said second squaring means.
Claim 6
Dependent Claim
33 words
A phase meter as defined in claim 1 wherein said pulse T and said pulse Delta t are incremented by a pulse source responsive to said pulse T and said pulse Delta t.
Claim 7
Dependent Claim
222 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two AC signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said AC signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; and means responsive to said pulse T and to said pulse Delta t for computing the phase angle between said two AC signals wherein said first and second squaring meanS are zero axis crossing detectors, wherein said means to derive said pulse T includes first and second serially connected flip-flop circuits, wherein said means to derive said pulse Delta t includes a third flip-flop circuit having an input coupled to said first squaring means and a fourth flip-flop circuit having a first input connected to the output of said third flip-flop circuit and a second input coupled to said second squaring means, and wherein said pulse T and said pulse Delta t are incremented by a first clock source responsive to said pulse T and said pulse Delta t.
Claim 8
Dependent Claim
222 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two AC signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said AC signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; and means responsive to said pulse T and to said pulse Delta t for computing the phase angle between said two AC signals wherein said first and second squaring meanS are zero axis crossing detectors, wherein said means to derive said pulse T includes first and second serially connected flip-flop circuits, wherein said means to derive said pulse Delta t includes a third flip-flop circuit having an input coupled to said first squaring means and a fourth flip-flop circuit having a first input connected to the output of said third flip-flop circuit and a second input coupled to said second squaring means, and wherein said pulse T and said pulse Delta t are incremented by a first clock source responsive to said pulse T and said pulse Delta t.
Claim 9
Dependent Claim
313 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two AC signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said ac signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; and means responsive to said pulse T and to said pulse Delta t for computing the phase angle between said two AC signals wherein said pulse T and said pulse Delta t are incremented by a first clock source responsive to said pulse T and said pulse Delta t and wherein said means to compute said phase angle comprises a first binary counter responsive to said incremented pulse T; a second binary counter responsive to said incremented pulse Delta t a first programmable divider connected to the output of said first binary counter; a second programmable divider connected to the output of said second binary counter; a second clock source connected to both said first and second programmable dividers; a binary coded decimal counter coupled to the output of said first programmable divider; a third binary counter coupled to the output of said second programmable divider; means coupled to said third binary counter and to said binary coded decimal counter for disabling both said binary to decimal counter and said third binary counter when said third binary counter has counted a predetermined number of count pulses from said second programmable divider; and visual readout means connected to the output of said binary coded decimal counter for providing a visual reading of the phase angle between said two AC input signals.
Claim 10
Dependent Claim
313 words
A phase meter for measuring the phase angle between two AC signals comprising: first means to square one of said two AC signals; second means to square the other of said two AC signals; means coupled to said first squaring means for deriving a pulse T the duration of which is equal to the period of said ac signals; means coupled to said first squaring means and to said second squaring means for deriving a pulse Delta t, the duration of which is equal to the time difference between said two AC signals; and means responsive to said pulse T and to said pulse Delta t for computing the phase angle between said two AC signals wherein said pulse T and said pulse Delta t are incremented by a first clock source responsive to said pulse T and said pulse Delta t and wherein said means to compute said phase angle comprises a first binary counter responsive to said incremented pulse T; a second binary counter responsive to said incremented pulse Delta t a first programmable divider connected to the output of said first binary counter; a second programmable divider connected to the output of said second binary counter; a second clock source connected to both said first and second programmable dividers; a binary coded decimal counter coupled to the output of said first programmable divider; a third binary counter coupled to the output of said second programmable divider; means coupled to said third binary counter and to said binary coded decimal counter for disabling both said binary to decimal counter and said third binary counter when said third binary counter has counted a predetermined number of count pulses from said second programmable divider; and visual readout means connected to the output of said binary coded decimal counter for providing a visual reading of the phase angle between said two AC input signals.
Claim 11
Dependent Claim
178 words
A phase meter as defined in claim 6 wherein said means to compute said phase angle comprises a first binary counter responsive to said incremented pulse T; a second binary counter responsive to said incremented pulse Delta t; a first programmable divider connected to the output of said first binary counter; a second programmable divider connected to the output of said second binary counter; a second clock source connected to both said first and second programmable dividers; a binary coded decimal counter coupled to the output of said first programmable divider; a third binary counter coupled to the output of said second programmable divider; means coupled to said third binary counter and to said binary coded decimal counter for disabling both said binary coded decimal counter and said third binary counter when said third binary counter has counted a predetermined number of count pulses from said second programmable divider; and visual readout means connected to the output of said binary coded decimal counter for providing a visual reading of the phase angle between said two ac input signals.
Claim 12
Dependent Claim
203 words
Apparatus for measuring the phase angle between two AC signals comprising: a first zero crossing detector; means to apply one of said two AC signals to the input of said first zero crossing detector; a second zero crossing detector; means to apply the other of said AC signals to the input of said second zero crossing detector; a first synchronizer circuit connected to the oUtput of said first zero crossing detector; a second synchronizer circuit connected to the output of said second zero crossing detector; a one shot multivibrator connected to both said first and second synchronizers; means responsive to the output of said first synchronizer for deriving a pulse T, the duration of which is equal to the period of said AC input signals; means responsive to the output from both said first and second synchronizers for deriving a pulse Delta t, the duration of which is equal to the time difference between said ac input signals; means responsive to said pulse T and pulse Delta t for incrementing said pulse T and said pulse Delta t; and computing means responsive to said incremented pulse T and said incremented pulse Delta t for computing the phase angle between said AC input signals.
Claim 13
Dependent Claim
203 words
Apparatus for measuring the phase angle between two AC signals comprising: a first zero crossing detector; means to apply one of said two AC signals to the input of said first zero crossing detector; a second zero crossing detector; means to apply the other of said AC signals to the input of said second zero crossing detector; a first synchronizer circuit connected to the oUtput of said first zero crossing detector; a second synchronizer circuit connected to the output of said second zero crossing detector; a one shot multivibrator connected to both said first and second synchronizers; means responsive to the output of said first synchronizer for deriving a pulse T, the duration of which is equal to the period of said AC input signals; means responsive to the output from both said first and second synchronizers for deriving a pulse Delta t, the duration of which is equal to the time difference between said ac input signals; means responsive to said pulse T and pulse Delta t for incrementing said pulse T and said pulse Delta t; and computing means responsive to said incremented pulse T and said incremented pulse Delta t for computing the phase angle between said AC input signals.
Claim 14
Dependent Claim
253 words
Apparatus as defined in claim 9 wherein said means to derive said pulse T comprises: a first NOR gate having first and second inputs; means to connect the output of said first synchronizer to said second input of said first NOR gate; a first flip-flop circuit connected to the output of said first NOR gate; a second flip-flop circuit connected to the output of said first flip-flop circuit and feedback means connected between the output of said second flip-flop circuit and said first input of said first NOR gate; and wherein said means to derive said pulse Delta t comprises: a first inverter connected to the output of said second synchronizer; a second inverter connected to the output of said first synchronizer; a third flip-flop circuit having an input, a normal output and an inverted output, means to connect said input of said third flip-flop circuit to the output of said second inverter; a fourth flip-flop circuit having a first input, a second input and an output; means to connect said normal output of said third flip-flop circuit to said first input of said fourth flip-flop circuit; means to connect the output of said first inverter to said second input of said fourth flip-flop circuit; a third NOR gate having first and second inputs; means to connect said output of said fourth flip-flop to said first input of said third NOR gate, and means to connect said inverted output of said third flip-flop circuit to said second input of said third NOR gate.
Claim 15
Dependent Claim
119 words
Apparatus as defined in claim 10 wherein said means responsive to said pulse T and said pulse Delta t comprises: a first NAND gate having a first input, a second input and an output; a second NAND gate having a first input, a second input and an output; a high frequency clock source; means to connect said high frequency clock source to said first input of said first NAND gate and to said first input of said second NAND gate; means to connect the output of said second flip-flop circuit to said second input of said first NAND gate and means to connect said output of said third NOR gate to said second input of said second NAND gate.
Claim 16
Dependent Claim
178 words
A phase meter as defined in claim 9 wherein said means to compute said phase angle comprises a first binary counter responsive to said incremented pulse T; a second binary counter responsive to said incremented pulse Delta t; a first programmable divider connected to the output of said first binary counter; a second programmable divider connected to the output of said second binary counter; a second clock source connected to both said first and second programmable dividers; a binary coded decimal counter coupled to the output of said first programmable divider; a third binary counter coupled to the output of said second programmable divider; means coupled to said third binary counter and to said binary coded decimal counter for disabling both said binary coded decimal counter and said third binary counter when said third binary counter has counted a predetermined number of count pulses from said second programmable divider; and visual readout means connected to the outpUt of said binary coded decimal counter for providing a visual reading of the phase angle between said two AC input signals.
Claim 17
Dependent Claim
283 words
Apparatus as defined in claim 11 wherein said computing means comprises: a first binary counter connected to said output of said first NAND gate; a second binary counter connected to said output of said second NAND gate; a first binary programmable divider connected to the output of said first binary counter; a second binary programmable divider connected to the output of said second binary counter; a third NAND gate having a first input, a second input and an output; a fourth NAND gate having a first input, a second input and an output; a fifth NAND gate having a plurality of inputs and an output; means to connect the output of said first programmable divider to said first input of said third NAND gate; means to connect the output of said second programmable divider to said first input of said fourth NAND gate; a third binary counter having an input connected to said output of said fourth NAND gate and a plurality of outputs corresponding in number to said plurality of inputs of said fifth NAND gate; means to connect one output of said plurality of outputs of said third binary counter to each one of said plurality of said fifth NAND gate inputs; a binary coded decimal counter connected to the output of said third NAND gate; visual readout means connected to the output of said binary coded decimal counter; and means to connect said output of said fifth NAND gate to said second input of said third NAND gate and to said second input of said fourth NAND gate to disable said third binary counter and said binary coded decimal counter when said third binary counter has reached a predetermined count.
Claim 18
Dependent Claim
41 words
Apparatus as defined in claim 13 wherein said predetermined count is 3,600 times the number of output pulses from said second programmable divider whereby said readout device indicates the phase angle between said ac input signals in tenths of a degree.
References Cited (Backward Citations)
US3286176A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-16 | 1975-11-15 | 1976-05-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-16 | 1979-11-15 | 1980-05-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-16 | 1983-11-15 | 1984-05-16 | $7700.00 | Window Closed / Lapsed |