Modular logic circuit utilizing charge-storage transistors

Claim 2

A modular logic circuit, utilizing logic elements formed of reprogrammable charge-storage transistors connected in a matrix array by horizontal and vertical lines, for performing a plurality of different logic functions, said circuit having several input terminals to which input signals are applied whereby a particular logic output signal is obtained at output terminals of the circuit in accordance with said input signals and a previous setting of logic elements, wherein particular logic functions can be set and reset any number of times, comprising: means for applying first setting signals to the input terminals wherein the setting signals, corresponding to a code, consist of separate signal elements; means for simultaneously applying second setting signals to the output terminals wherein the setting signals, corresponding to a code, consist of separate signal elements; a first group of said horizontal lines; a second group of said horizontal lines, each horizontal line in said second group making up respective output signal paths connected to one of said output terminals; each of said signal elements of the first setting signals being applied to a separate and distinct one of said horizontal lines in said first group; and, selector signal means (AS1 . . . ASp)for applying said second setting signals to activate at least one of said vertical lines.

Claim 3

The modular logic circuit as described in claim 1 wherein: each of the first setting signals is applied to a separate and distinct horizontal line in said first group of said horizontal lines whereby only the logic elements connected to horizontal lines of said first group can be set; the logic elements connected to horizontal lines of said second group are set by utilizing the previous setting of the logic elements connected to horizontal lines of said first group, whereby third setting signals are applied to the input terminals to set the remaining unset logic elements in a vertical line; and are simultaneously applied fourth setting signals to the output terminals associated with the logic elements to be set.

Claim 4

The modular logic circuit as described in claim 1 wherein: each logic element, connected to the horizontal lines of the first group, is set by applying different first and second setting signals.

Claim 5

The modular logic circuit as described in claim 2 wherein: each logic element, connected to horizontal lines of the second group, is set by applying different third and fourth setting signals.

Claim 6

The modular logic circuit as described in claim 1 further comprising an input amplifier connected to each input terminal, wherein said input amplifier includes: a first driver stage having an input terminal and a negating output terminal; a second driver stage having an input terminal and a negating output terminal, wherein the negating output terminal of the first driver stage is connected to the input terminal of the second driver stage and connected to a first horizontal line of said first group of horizontal lines; wherein the negating output terminal of the second driver stage is connected to the second horizontal line of said first group of horizontal lines; a threshold means for coupling the input of the first driver stage to first and second NOT gates, wherein the first NOT gate couples the output of the threshold means to the negating output of the first driver stage, and the second NOT gate couples the output of the threshold means to the negating output of the second driver stage; wherein the application of an input signal to the input terminals having either a first or second level, the second level not being in excess of a predetermined magnitude, produces a high binary level signal at the first horizontal line and a low binary level signal at the second horizontal line, or vice versa; and, the application of an input signal having a magnitude in excess of the predetermined magnitude produces a low binary level signal at both the first and second horizontal lines.

Claim 7

The modular logic circuit as described in claim 5 further comprising: logic elements having a charging gate terminal, a source terminal, and a drain terminal; wherein the logic elements connected to horizontal lines of the first group, which are not to be set, have a low binary level signal applied to their charging gate terminal.

Claim 8

The modular logic circuit as described in claim 1 wherein: the logic elements are field effect transistors having a charging gate terminal, a source terminal and a drain terminal; only one field effect transistor is connected at each intersection of the vertical lines and the horizontal lines of the first and second group of horizontal lines; the field effect transistors connected to horizontal lines of the first group have their charging gate connected to the horizontal lines of the first group; the field effect transistors connected to horizontal lines of the second group have their drain gate terminals connected to the horizontal lines of the second group; and, the source gate terminals of the field effect transistors connected to horizontal lines of the first group are interconnected, and the source gate terminals of the field effect transistors connected to horizontal lines of the second group are interconnected.

Claim 9

The modular logic circuit as described in claim 7 wherein: the source terminals of the field effect transistors connected to horizontal lines of the first group are connected to a first source control terminal whereby the field effect transistors can be switched to a set state by the application of a first potential or can be switched to an unblocked state by application of a second potential.

Claim 10

The modular logic circuit as described in claim 8 wherein: the source terminals of the field effect transistors connected to horizontal lines of the second group are connected to a second source control terminal whereby the field effect transistors can be switched to a set state by the application of a first potential or can be switched to an unblocked state by the application of a second potential.

Claim 11

The modular logic circuit as described in claim 1 wherein: the selector signal means comprises electronic selectors having a common reversing input terminal.

Claim 12

The modular logic circuit as described in claim 10, wherein: the number of vertical lines is substantially greater than the number of output terminals; and, the electronic selectors switch the second setting signal applied to the output terminals to a decoder matrix.

Claim 13

The modular logic circuit as described in claim 11 wherein: each output of the decoder matrix is connected to a respective vertical line; a discharging switch means is provided in each vertical line to discharge spurious capacitance; and, a second control signal means is provided to actuate the discharge switch means at the end of a setting operation.

Claim 14

The modular logic circuit as described in claim 1 wherein the circuit is constructed in a single modular form by semi-conductor circuit techniques.