Patent US4088828A successfully refreshed from Google Patents.
US4088828A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Printed circuit board
Assignee: Panasonic Holdings Corp
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Filing: 1976-03-01
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Granted: 1978-05-09
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Expires: 1996-03-01
Abstract
Abstract A printed circuit board wherein a conductor pattern is printed on an insulating base, first solder resist layers are formed on the surface of the conductor pattern remaining lands which are for soldering thereon, second solder resist layers for prevention of bridging for preventing bridging of solder are formed at least at portions where the gap between the lands is narrow, and thereby electronic parts such as an IC can be reliably assembled on the printed circuit board.
Inventors
- 👤 Yoshio Yamamoto
- 👤 Masaki Sono
- 👤 Masahiko Ekeuti
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:31
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3452; H05K1/00; H05K1/02; H05K1/0266; H05K1/11; H05K1/115; H05K1/116; H05K2201/00; H05K2201/09; H05K2201/09818; H05K2201/09936; H05K2203/00; H05K2203/05; H05K2203/0562; H05K2203/0588; H05K3/3447
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
75 words
A printed circuit board comprising an insulating base, a conductor pattern printed on said insulating base, a first solder resist layer formed on the entire surface of the conductor pattern remaining lands which are for soldering thereon, and a second solder resist layer for prevention of bridging of interland gaps by solder, said second solder resist layer being formed on said first solder resist layer at least over portions thereof where interland gaps are narrow.
Claim 2
Dependent Claim
75 words
A printed circuit board comprising an insulating base, a conductor pattern printed on said insulating base, a first solder resist layer formed on the entire surface of the conductor pattern remaining lands which are for soldering thereon, and a second solder resist layer for prevention of bridging of interland gaps by solder, said second solder resist layer being formed on said first solder resist layer at least over portions thereof where interland gaps are narrow.
Claim 3
Dependent Claim
32 words
A printed circuit board according to claim 1, wherein said second solder resist layer is formed over the entire area of the part for mounting electronic parts such as semiconductor integrated circuits.
Claim 4
Dependent Claim
33 words
A printed circuit board according to claim 1, wherein said second solder resist layer is printed with a mark print ink simultaneously with the printing of marks or symbols of assembled electronic parts.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-05-08 | 1981-11-07 | 1982-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-05-08 | 1985-11-07 | 1986-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-05-08 | 1989-11-07 | 1990-05-09 | $7700.00 | Window Closed / Lapsed |