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US4086755A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for correcting second hand of electronic timepiece

Assignee: Seiko Instruments Inc
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Filing: 1975-11-13
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Granted: 1978-05-02
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Expires: 1995-11-13
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Abstract

Abstract An electronic timepiece comprises an oscillator which generates high frequency pulses, a dividing circuit connected to receive the high frequency pulses from the oscillator and divide them into lower frequency pulses suitable for use as a time standard, and a time indicator responsive to the lower frequency pulses for indicating the time in at least minutes and seconds. An apparatus for correcting the seconds indication of the time indicator comprises a delaying circuit connected to receive lower frequency pulses from the dividing circuit and delay them a predetermined time period, and a selecting circuit connected to receive both the lower frequency pulses and the delayed pulses and selectively pass them to the time indicator in response to control signals. An advance-set circuit is connected to an advancing switch and responds to each switch actuation to transmit an advance control signal to the selecting circuit which then adds a lower frequency pulse to a delayed pulse to thereby advance the seconds indication, and a retard-set circuit is connected to a retarding switch and responds to each switch actuation to transmit a retard control signal to the selecting circuit which then inhibits the passing of a lower frequency pulse to thereby retard the seconds indication. An up-down counter coacts with an advance-reset circuit and a retard-reset circuit for counting the number of actuations of the advancing and retarding switches and effecting resetting of corresponding ones of the advance-set and retard-set circuits.

Inventors

  • 👤 Takashi Ueda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:21
CPC Classifications
G; G04; G04G; G04G5/00; G04G5/02

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 367 words
In an electronic timepiece of the type having an oscillator for generating high frequency pulses; a dividing circuit connected to receive the high frequency pulses from said oscillator and divide them into lower frequency pulses suitable for use as a time standard; and indicating means responsive to the lower frequency pulses for indicating the time in at least minutes and seconds; an apparatus for correcting the seconds indication of said indicating means comprising a delaying circuit connected to receive lower frequency pulses from said dividing circuit and delay them a predetermined time period, a selecting circuit connected to receive the lower frequency pulses from said dividing circuit and connected to receive the delayed lower frequency pulses from said delaying circuit and operative in response to control signals applied thereto to selectively pass the pulses to said indicating means, resettable second advancing means operative when actuated to develop an advance control signal and apply it to said selecting circuit whereby said selecting circuit adds a lower frequency pulse to a delayed lower frequency pulse to thereby advance the seconds indication, resettable second retarding means operative when actuated to develop a retard control signal and apply it to said selecting circuit whereby said selecting circuit inhibits the passing of a lower frequency pulse to thereby retard the seconds indication, actuating means for selectively actuating said second advancing means and said second retarding means to thereby accordingly correct the seconds indication of said indicating means, said actuating means including a manually actuatable advancing switch connected to said second advancing means and operative to effect an advance of the seconds indication by one second in response to each switch actuation irrespective of the duration of the switch actuations, and a manually actuatable retarding switch connected to said second retarding means and operative to effect a retard of the seconds indication by one second in response to each switch actuation irrespective of the duration of the switch actuations, and counting means for counting the number of actuations of said advancing and retarding switches and effecting resetting of corresponding ones of said second advancing means and second retarding means upon correction of the seconds indication as determined by the number of switch actuations.
Claim 2
Dependent Claim 367 words
In an electronic timepiece of the type having an oscillator for generating high frequency pulses; a dividing circuit connected to receive the high frequency pulses from said oscillator and divide them into lower frequency pulses suitable for use as a time standard; and indicating means responsive to the lower frequency pulses for indicating the time in at least minutes and seconds; an apparatus for correcting the seconds indication of said indicating means comprising a delaying circuit connected to receive lower frequency pulses from said dividing circuit and delay them a predetermined time period, a selecting circuit connected to receive the lower frequency pulses from said dividing circuit and connected to receive the delayed lower frequency pulses from said delaying circuit and operative in response to control signals applied thereto to selectively pass the pulses to said indicating means, resettable second advancing means operative when actuated to develop an advance control signal and apply it to said selecting circuit whereby said selecting circuit adds a lower frequency pulse to a delayed lower frequency pulse to thereby advance the seconds indication, resettable second retarding means operative when actuated to develop a retard control signal and apply it to said selecting circuit whereby said selecting circuit inhibits the passing of a lower frequency pulse to thereby retard the seconds indication, actuating means for selectively actuating said second advancing means and said second retarding means to thereby accordingly correct the seconds indication of said indicating means, said actuating means including a manually actuatable advancing switch connected to said second advancing means and operative to effect an advance of the seconds indication by one second in response to each switch actuation irrespective of the duration of the switch actuations, and a manually actuatable retarding switch connected to said second retarding means and operative to effect a retard of the seconds indication by one second in response to each switch actuation irrespective of the duration of the switch actuations, and counting means for counting the number of actuations of said advancing and retarding switches and effecting resetting of corresponding ones of said second advancing means and second retarding means upon correction of the seconds indication as determined by the number of switch actuations.
Claim 3
Dependent Claim 15 words
An electronic timepiece according to claim 1; wherein said counting means comprises an up-down counter.
Claim 4
Dependent Claim 92 words
An electronic timepiece according to claim 1; wherein said resettable second advancing means comprises an advance-set circuit connected to said advancing switch and responsive to each switch actuation to transmit an advance control signal to said selecting circuit, and means including an advance-reset circuit for resetting said advance-set circuit, and wherein said resettable second retarding means comprises a retard-set circuit connected to said retarding switch and responsive to each switch actuation to transmit a retard control signal to said selecting circuit, and means including a retard-reset circuit for resetting said retard-set circuit.
Claim 5
Dependent Claim 46 words
An electronic timepiece according to claim 3; wherein said counting means includes means coacting with said advance-reset circuit and said retard-reset circuit for counting the number of actuations of said advancing and retarding switches and effecting resetting of corrresponding ones of said advance-set and retard-set circuits.
Claim 6
Dependent Claim 15 words
An electronic timepiece according to claim 4; wherein said counting means comprises an up-down counter.

References Cited (Backward Citations)

US3668859A Cited
US3823545A Cited
US3834152A Cited
US3895486A Cited
US3931703A Cited
US3948035A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-05-01 1981-10-31 1982-05-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-05-01 1985-10-31 1986-05-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-05-01 1989-10-31 1990-05-02 $7700.00 Window Closed / Lapsed

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