Patent US4086430A successfully refreshed from Google Patents.
US4086430A
Expired / Lapsed
US
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Detection circuitry
Assignee: Motorola Solutions Inc
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Filing: 1975-11-14
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Granted: 1978-04-25
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Expires: 1995-11-14
Abstract
Abstract A detection circuitry designed to sense a composite signal of the type such as composite frequency shift keying (FSK) 50% amplitude modulated (AM) signal or pulse code modulated return to zero FSK type signal. The circuitry includes means for separating the composite signal into its constituent components and means for converting the separated signals into an amplitude envelope signal and a differentiated DC component. The circuitry includes a trigger circuitry for providing an output signal when the input thereof is of a predetermined polarity and amplitude and means including peak detection circuitry for applying the amplitude envelope and DC component so that the polarity of the differentiated DC component is applied to the trigger circuitry in the predetermined polarity so that the DC component is additive to the amplitude envelope, whereby the speed with which the trigger responds to the start and the end of the incoming composite signal is fast.
Inventors
- 👤 Kenneth Harvey Brown
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 19:12
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
181 words
Detention circuitry for detecting an incoming composite signal of the type, such as Frequency Shift Keying 50% amplitude modulation (FSK 50% AM) or FSK-PCM (pulse code modulation) return-to-zero signal, comprising a plurality of channels for separating the composite signal and forming amplitude envelope signals the corresponding constituent signals forming the composite signal, means connected to said plurality of channels for summing and differentiating the envelope signals and filtering the summed and differentiated envelope signals into a bandpass filtered signal that is a composite of an AC and differentiated DC components, output means for generating an output signal upon detection of a required input signal thereto having an amplitude which exceeds a predetermined value and a predetermind polarity, and means interposed between said output means and said summing, differentiating and filtering means for setting the polarity of the DC component of the bandpass filtered signal so that the DC component is the same polarity as that of the required input signal of said output means for hastening the speed of the output means in sensing the start of the incoming composite signal.
Claim 2
Dependent Claim
181 words
Detention circuitry for detecting an incoming composite signal of the type, such as Frequency Shift Keying 50% amplitude modulation (FSK 50% AM) or FSK-PCM (pulse code modulation) return-to-zero signal, comprising a plurality of channels for separating the composite signal and forming amplitude envelope signals the corresponding constituent signals forming the composite signal, means connected to said plurality of channels for summing and differentiating the envelope signals and filtering the summed and differentiated envelope signals into a bandpass filtered signal that is a composite of an AC and differentiated DC components, output means for generating an output signal upon detection of a required input signal thereto having an amplitude which exceeds a predetermined value and a predetermind polarity, and means interposed between said output means and said summing, differentiating and filtering means for setting the polarity of the DC component of the bandpass filtered signal so that the DC component is the same polarity as that of the required input signal of said output means for hastening the speed of the output means in sensing the start of the incoming composite signal.
Claim 3
Dependent Claim
76 words
Detection circuitry according to claim 1, wherein said summing, differentiating and filtering means includes a plurality of resistive means connected to the output of said plurality of channels, capacitive means connected to the plurality of resistive means for differentiating the output of the channels summed by said resistive means, first operational amplifier and a filtering network in shunt with said first operational amplifier for providing a predetermined bandpass filtering action to the summed and differentiated signal.
Claim 4
Dependent Claim
62 words
The detection circuitry according to claim 2 wherein said means interposed between said output means and said summing differentiating and filtering means includes a second operational amplifier coupled to the output of said first operational amplifier for inverting the output of said first operational amplifier, and peak detection means for detecting the amplitude peak of the output of said second operational amplifier.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-04-24 | 1981-10-24 | 1982-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-04-24 | 1985-10-24 | 1986-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-04-24 | 1989-10-24 | 1990-04-25 | $7700.00 | Window Closed / Lapsed |