US4083045A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mos analog to digital converter
Assignee: Motorola Solutions Inc
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Filing: 1975-07-03
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Granted: 1978-04-04
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Expires: 1995-07-03
Abstract
Abstract An MOS analog to digital converter circuit is provided in which an MOS enhanced capacitor is interposed between a buffer circuit responsive to an analog input and a digital output. The capacitance value present between the first terminal and the second terminal of the MOS enchanced capacitor is determined by the particular value of analog input voltage applied via the input buffer circuit. An oscillator pulse coupled to a second terminal of the enhanced capacitor produces a resultant pulse on the first terminal of the enhanced capacitor which in turn is coupled to an input of digital comparator circuits which are part of the digital output means. A series of reference voltages coupled to the other inputs of the digital comparator circuits allow the generation of a series of digital output signals whose value is indicative of the value of analog input signal present, thus accomplishing the analog to digital conversion function.
Inventors
- 👤 William Walter Lattin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:24
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/124; H03M1/1245
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
203 words
An analog to digital converter circuit comprising: (a) enhanced capacitor means having a first terminal and a second terminal; (b) buffer circuit means coupled to said first terminal, said buffer circuit means responsive to an analog input signal; (c) digital comparator means having a first input terminal coupled to said first terminal and having a second input terminal coupled to a reference voltage, said digital comparator means producing a first logical state when said first input terminal is at a greater potential than said second input terminal and said digital comparator means producing a second logical output state when said first input terminal is at a lesser potential than said second input terminal; (d) circuit means coupled to said second capacitor terminal for producing a voltage pulse at said second capacitor terminal, thereby inducing a derived voltage pulse at said first capacitance terminal said derived voltage pulse establishing input conditions at said first input terminal to produce a digital output signal proportional to said analog input signal, and (e) MOSFET switching means coupled to said first capacitor terminal and coupled to said circuit means, said MOSFET switching means responsive to said circuit means for establishing initial voltage conditions at said first capacitor terminal.
Claim 2
Dependent Claim
203 words
An analog to digital converter circuit comprising: (a) enhanced capacitor means having a first terminal and a second terminal; (b) buffer circuit means coupled to said first terminal, said buffer circuit means responsive to an analog input signal; (c) digital comparator means having a first input terminal coupled to said first terminal and having a second input terminal coupled to a reference voltage, said digital comparator means producing a first logical state when said first input terminal is at a greater potential than said second input terminal and said digital comparator means producing a second logical output state when said first input terminal is at a lesser potential than said second input terminal; (d) circuit means coupled to said second capacitor terminal for producing a voltage pulse at said second capacitor terminal, thereby inducing a derived voltage pulse at said first capacitance terminal said derived voltage pulse establishing input conditions at said first input terminal to produce a digital output signal proportional to said analog input signal, and (e) MOSFET switching means coupled to said first capacitor terminal and coupled to said circuit means, said MOSFET switching means responsive to said circuit means for establishing initial voltage conditions at said first capacitor terminal.
Claim 3
Dependent Claim
115 words
An MOS analog to digital converter circuit comprising: (a) enhanced capacitor means having a first capacitor terminal and a second capacitor terminal; (b) input means responsive to an analog input value and coupled to said first capacitor terminal, said analog input value determining a capacitance value between said first capacitance terminal and said second capacitance terminal; (c) digital output means coupled to said first capacitance terminal for producing a digital output signal whose value is proportionate to the capacitance value established between said first capacitor terminal and said second capacitor terminal by said analog input value, and (d) means coupled to said digital output means for establishing initial voltage conditions at said first capacitor terminal.
Claim 4
Dependent Claim
115 words
An MOS analog to digital converter circuit comprising: (a) enhanced capacitor means having a first capacitor terminal and a second capacitor terminal; (b) input means responsive to an analog input value and coupled to said first capacitor terminal, said analog input value determining a capacitance value between said first capacitance terminal and said second capacitance terminal; (c) digital output means coupled to said first capacitance terminal for producing a digital output signal whose value is proportionate to the capacitance value established between said first capacitor terminal and said second capacitor terminal by said analog input value, and (d) means coupled to said digital output means for establishing initial voltage conditions at said first capacitor terminal.
Claim 5
Dependent Claim
123 words
An analog to digital converter circuit comprising: (a) digital comparator means having a first input terminal, a second input terminal and a digital output terminal; (b) second pulse source means having an output terminal coupled to said second input terminal; (c) capacitance means having a first terminal and a second terminal, said second terminal coupled to said first input terminal; (d) enhanced capacitance means having a first terminal and a second terminal, the first terminal of the enhanced capacitance means coupled to the first terminal of the capacitance means and coupled to a terminal to provide an analog input for said converter circuit; and (e) a first pulse source having an output terminal connected to said second terminal of said enhanced capacitance means.
Claim 6
Dependent Claim
123 words
An analog to digital converter circuit comprising: (a) digital comparator means having a first input terminal, a second input terminal and a digital output terminal; (b) second pulse source means having an output terminal coupled to said second input terminal; (c) capacitance means having a first terminal and a second terminal, said second terminal coupled to said first input terminal; (d) enhanced capacitance means having a first terminal and a second terminal, the first terminal of the enhanced capacitance means coupled to the first terminal of the capacitance means and coupled to a terminal to provide an analog input for said converter circuit; and (e) a first pulse source having an output terminal connected to said second terminal of said enhanced capacitance means.
Claim 7
Dependent Claim
21 words
The analog to digital converter circuit recited in claim 3 wherein said enhanced capacitor means is a digitally controllable enhanced capacitor.
Claim 8
Dependent Claim
27 words
The analog to digital converter circuit recited in claim 4 wherein said first pulse source, said second pulse source and said digital output means comprise MOSFET devices.
Claim 9
Dependent Claim
21 words
The analog to digital converter circuit recited in claim 5 wherein said MOSFET devices are incorporated in a monolithic integrated circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-04-03 | 1981-10-03 | 1982-04-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-04-03 | 1985-10-03 | 1986-04-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-04-03 | 1989-10-03 | 1990-04-04 | $7700.00 | Window Closed / Lapsed |