Dual-CCD, real-time, fully-analog correlator

Claim 2

An analog correlator comprising: first and second charge transfer shift register devices each comprising a plurality of successive stages and operable to propagate a charge packet therethrough at a predetermined shift cycle rate, injector means for injecting a charge packet into each said shift register for propagation therethrough, means for supplying samples of a signal and of a function to respective said injectors associated with said first and second shift registers for injecting charge packets corresponding thereto for propagation through said respective shift registers, means for effecting parallel, non-destructive sensing of said charge packets propagating through corresponding stages of said first and second shift registers and for providing corresponding first and second output potential signals representative thereof, means for multiplying each of the corresponding first and second output potential signals from said sensing means to produce respectively corresponding output product signals indicative of the respective products thereof, and means for summing the output product signals of said multiplier means for all of said corresponding, respective sensing means of said first and second shift registers.

Claim 3

A correlator as recited in claim 1 wherein each said means for supplying said signal and function samples includes a source of a reference voltage, means for selecting alternate samples of said reference voltage and said signal, and of said reference voltage and said function for supplying to the respective said shift registers to effect injection and propagation of respectively corresponding signal and reference, and function and reference, charge packets through said respective first and second shift registers, and said multiplying means differentially multiplies the output signals sensed from said respective first and second shift registers in accordance with said propagating charge packets corresponding to said signal and reference, and to said function and reference values, each said multiplier having a differential configuration to produce the multiplication product output thereof with biases and non-linearities of said respective output signals from said shift registers cancelled, at least as to said signal samples.

Claim 4

A correlator as recited in claim 1 for performing the function: ##EQU9## where x(j) represents the samples of the signal and y(J) represents the samples of the function.

Claim 5

A correlator as recited in claim 1 wherein said shift registers, said multipliers, and said summing means are provided on a monolithic semiconductor structure.

Claim 6

A correlator as recited in claim 1 wherein each of said shift registers including a plurality of said sensor means respectively associated with plural stages of said shift register, each of said stages including a group of plural electrodes, one thereof comprising a sensor electrode, and there is further provided: control means for supplying clocking signals to respective ones of said plural electrodes of each of said stages to shift a charge packet through the successive stages of said charge transfer device at a predetermined cyclic shift rate, and defining in said shift cycle thereof a succession of reset, clamp, mux, and sample intervals in relation to the said clocking signals, said control means generating a reset signal in timed relation to said clocking signals for defining said reset interval, switching means connected to the said predetermined sensor electrode and to said control means for receiving the clocking signal associated with said sensor electrode, said switching means normally being open so as to isolate said sensor electrode from said clocking signal and said control means, said switching means being rendered conductive in response to said reset signal, for applying said corresponding clocking signal to said sensor electrode to render the latter repulsive and then attractive during said reset interval, said control means applying corresponding clocking signals to others of said group of electrodes of said output stage during said reset interval to isolate said sensor electrode from charge packets propagating through said charge transfer device prior to said sensor electrode clocking signal rendering said sensor electrode attractive during said reset interval, said control means terminating said reset signal and opening said switching means thereby to isolate said sensor electrode from said clocking signal and said control means, said sensor electrode maintaining said attractive potential condition thereof, during said clamp, mux, and sample intervals, said corresponding clocking signals applied to others of said electrodes of said group advancing a charge packet to the potential well of said sensor electrode during said mux interval and confining said charge packet therein during said sample interval, means connected to said sensor electrode for sampling the potential induced therein by the charge packet retained in the potential well thereof during said sample interval and producing an output signal sample representative thereof, and said sample interval terminating prior to a next successive reset interval.

Claim 7

A correlator as recited in claim 1 wherein said sensing means comprise floating clock electrode sensors.

Claim 8

A correlator as recited in claim 1 wherein said injectors for said respective charge transfer device shift registers comprise stabilized charge injectors, each injecting a charge packet linearly related to the respective input signal and function samples.

Claim 9

A correlator as recited in claim 1, further comprising: means for performing extended double correlation for cancellation of threshold and leakage current non-uniformities of both said signal and function charge transfer device channels.