Patent US4072890A successfully refreshed from Google Patents.
US4072890A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage regulator
Assignee: Samsung Electronics Co Ltd
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Filing: 1976-10-18
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Granted: 1978-02-07
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Expires: 1996-10-18
Abstract
Abstract A voltage regulator using CMOS (complementary metal-oxide semiconductor) signal processing. A sample of the regulator's output voltage is supplied to a voltage-controlled oscillator which produces an unsymmetrical output waveform which in turn drives a switching transistor. The switching transistor, when ON, supplies power from an unregulated source to a load circuit. Any deviation in the regulated output voltage from the desired level causes a compensating change in the ratio of ON to OFF times of the switching transistor.
Inventors
- 👤 L. V. Westbrook
- 👤 R. L. Payne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:38
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
133 words
An integrated circuit voltage regulator for converting an unregulated potential applied to an input conductor into a regulated potential supplied to an output conductor comprising, in combination: at least first, second and third insulated-gate field-effect transistors each having a gate electrode and a transconductive channel, means for applying a potential having an amplitude related to said regulated potential to the gate of said first transistor, a timing capacitor, means for charging said timing capacitor through the series combination of the channels of said first and second transistors, means for discharging said timing capacitor through the series combination of a substantially constant resistance and the channel of said third transistor, and means for reversing the conductivity states of said second and third transistors when the voltage across said timing capacitor reaches a predetermined value.
Claim 2
Dependent Claim
133 words
An integrated circuit voltage regulator for converting an unregulated potential applied to an input conductor into a regulated potential supplied to an output conductor comprising, in combination: at least first, second and third insulated-gate field-effect transistors each having a gate electrode and a transconductive channel, means for applying a potential having an amplitude related to said regulated potential to the gate of said first transistor, a timing capacitor, means for charging said timing capacitor through the series combination of the channels of said first and second transistors, means for discharging said timing capacitor through the series combination of a substantially constant resistance and the channel of said third transistor, and means for reversing the conductivity states of said second and third transistors when the voltage across said timing capacitor reaches a predetermined value.
Claim 3
Dependent Claim
61 words
A voltage regulator as set forth in claim 1 wherein said second and third transistors are of opposite conductivity type and wherein said means for reversing the conductivity states comprises, in combination two cascaded inverters connected across said timing capacitor and a connection between the output of the second of said inverters to the gates of said second and third transistors.
Claim 4
Dependent Claim
87 words
A voltage regulator as set forth in claim 1 wherein said means for applying a potential to the gate of said first transistor comprises fourth and fifth transistors of opposite conductivity type having their channels connected in series, said fourth transistor having the same conductivity type as said first transistor, a connection between the junction of the channels of said fourth and fifth devices and the gate of said first device, and a signal supply connection between said output conductor and the gate of said fifth transistor.
Claim 5
Dependent Claim
158 words
An integrated circuit voltage regulator for converting an unregulated voltage from a power source into a regulated voltage supplied to a load circuit comprising, in combination four insulated gate field-effect transistors each having a gate electrode and a transconductive channel, means connecting the channels of said first, second and third transistors in series across said power source, said second and third transistors being of opposite conductivity type, a timing capacitor connected between the junction of said second and third transistors and the gates of both said second and third transistors, a pair of cascaded inverters having their input connected to said junction point and their output connected to the gates of said second and third transistors, a switching transistor having its channel connected to supply power from said source to said load and its gate connected to the output of said cascaded inverters, and a feedback connection between said load circuit and the gate of said first transistor.
Claim 6
Dependent Claim
158 words
An integrated circuit voltage regulator for converting an unregulated voltage from a power source into a regulated voltage supplied to a load circuit comprising, in combination four insulated gate field-effect transistors each having a gate electrode and a transconductive channel, means connecting the channels of said first, second and third transistors in series across said power source, said second and third transistors being of opposite conductivity type, a timing capacitor connected between the junction of said second and third transistors and the gates of both said second and third transistors, a pair of cascaded inverters having their input connected to said junction point and their output connected to the gates of said second and third transistors, a switching transistor having its channel connected to supply power from said source to said load and its gate connected to the output of said cascaded inverters, and a feedback connection between said load circuit and the gate of said first transistor.
References Cited (Backward Citations)
US3757200A
Cited
US3925720A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-02-06 | 1981-08-08 | 1982-02-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-02-06 | 1985-08-08 | 1986-02-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-02-06 | 1989-08-08 | 1990-02-07 | $7700.00 | Window Closed / Lapsed |