US4069479A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed, wide dynamic range analog-to-digital conversion
Assignee: United States Department of Commerce
•
Filing: 1976-03-03
•
Granted: 1978-01-17
•
Expires: 1996-03-03
Abstract
Abstract A wide dynamic range, wide bandwidth, analog-to-digital conversion system and method. A plurality of overlapped analog-to-digital converters are utilized in conjunction with scaling amplifiers to provide a plurality of output ranges. Means for selecting the set of output bits which provides a magnitude representation of the input signal are provided along with means for outputting a digital representation of the appropriate range.
Inventors
- 👤 Robert J. Carpenter
- 👤 Kenneth W. Yee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:47
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/06; H03M1/0617; H03M1/0675; H03M1/069
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
166 words
An expanded dynamic range analog-to-digital conversion system having a plurality of output ranges of Y-bit resolution comprising, an input for receiving an analog input signal, a plurality of separate analog-to-digital converters of X-bit resolution, X being a number greater than Y, a unit gain signal path between said input and one of said analog-to-digital converters, amplification means between said input and another of said analog-to-digital converters, said other of said converters corresponding to lower output ranges than said one of said converters, means for determining the most significant output bit of said converters and for generating a digital signal representative of the identity of said most significant bit, and output means for outputting a digital representation of a set of bits comprised of said most significant bit and the (Y-1) bits which are successively numerically beneath said most significant bit, said digital signal which is representative of the identity of the most significant bit also being representative of the output range of said set of bits.
Claim 2
Dependent Claim
166 words
An expanded dynamic range analog-to-digital conversion system having a plurality of output ranges of Y-bit resolution comprising, an input for receiving an analog input signal, a plurality of separate analog-to-digital converters of X-bit resolution, X being a number greater than Y, a unit gain signal path between said input and one of said analog-to-digital converters, amplification means between said input and another of said analog-to-digital converters, said other of said converters corresponding to lower output ranges than said one of said converters, means for determining the most significant output bit of said converters and for generating a digital signal representative of the identity of said most significant bit, and output means for outputting a digital representation of a set of bits comprised of said most significant bit and the (Y-1) bits which are successively numerically beneath said most significant bit, said digital signal which is representative of the identity of the most significant bit also being representative of the output range of said set of bits.
Claim 3
Dependent Claim
61 words
The conversion system of claim 1 wherein said means for outputting said digital representation comprises Y multiplexer means, a plurality of output bits of each converter being connected to the inputs of each multiplexer means, said means for determining and generating being arranged to control the addressing of said multiplexer means so that said multiplexer means output said set of bits.
Claim 4
Dependent Claim
17 words
The conversion system of claim 2 wherein said means for determining and generating comprises priority encoder means.
Claim 5
Dependent Claim
35 words
The conversion system of claim 1 further including the series combination of means for taking the absolute value of said input signal and sample and hold means connected between said input and each analog-to-digital converter.
Claim 6
Dependent Claim
23 words
The conversion system of claim 4 further including sign detector means for outputting a signal indicative of the sign of said input signal.
Claim 7
Dependent Claim
155 words
An expanded dynamic range analog-to-digital conversion method utilizing a plurality of separate analog-to-digital converters of X-bit resolution to provide a plurality of output ranges of Y-bit resolution, X being a number greater than Y, comprising the steps of providing an input signal and feeding said input signal to one of said analog-to-digital converters, multiplying said input signal and then inputting it to another of said analog-to-digital converters having lower output ranges than said one of said converters, determining the most significant output bit of said converters and generating a digital signal representative of the identity of said most significant bit, and providing a digital representation of a set of bits comprised of said most significant bit and the (Y-1) bits which are successively numerically beneath said most significant bit, said digital signal which is representative of the identity of the most significant bit also being representative of the output range of said set of bits.
Claim 8
Dependent Claim
155 words
An expanded dynamic range analog-to-digital conversion method utilizing a plurality of separate analog-to-digital converters of X-bit resolution to provide a plurality of output ranges of Y-bit resolution, X being a number greater than Y, comprising the steps of providing an input signal and feeding said input signal to one of said analog-to-digital converters, multiplying said input signal and then inputting it to another of said analog-to-digital converters having lower output ranges than said one of said converters, determining the most significant output bit of said converters and generating a digital signal representative of the identity of said most significant bit, and providing a digital representation of a set of bits comprised of said most significant bit and the (Y-1) bits which are successively numerically beneath said most significant bit, said digital signal which is representative of the identity of the most significant bit also being representative of the output range of said set of bits.
References Cited (Backward Citations)
US3467958A
Cited
US3569953A
Cited
US3611355A
Cited
US3737894A
Cited
US3798637A
Cited
US3721975A
Cited
US3790947A
Cited
US3891984A
Cited
US3820112A
Cited
US3956746A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-01-16 | 1981-07-18 | 1982-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-01-16 | 1985-07-18 | 1986-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-01-16 | 1989-07-18 | 1990-01-17 | $7700.00 | Window Closed / Lapsed |