Patent US4069068A successfully refreshed from Google Patents.
US4069068A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions
Assignee: International Business Machines Corp
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Filing: 1976-07-02
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Granted: 1978-01-17
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Expires: 1996-07-02
Abstract
Abstract A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.
Inventors
- 👤 Klaus D. Beyer
- 👤 Gobinda Das
- 👤 Michael R. Poponiak
- 👤 Tsu-Hsing Yeh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 23:55
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/208; H10P30/214; H10P36/00; H10P36/03; H10P95/00; H10P95/40; H10P95/402; Y; Y10; Y10S; Y10S148/00; Y10S148/024
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
125 words
In the method of manufacture of a semiconductor device, a method of forming an emitter region with a substantial reduction in the number of pipes which result in shorts or leakages between two regions of identical conductivity, comprising the steps of; forming a base region of a semiconductor device, and introducing nucleation sites for dislocation loops by ion implanting non-dopant ions into said base region of the semiconductor device to be subsequently doped with emitter type impurity, said nucleation sites being formed near the front surface of said base region of said device, and subsequently introducing emitter type impurity into said region to form the emitter region whereby said nucleation sites are converted into small electrically harmless dislocation loops thereby reducing the number of pipes.
Claim 2
Dependent Claim
125 words
In the method of manufacture of a semiconductor device, a method of forming an emitter region with a substantial reduction in the number of pipes which result in shorts or leakages between two regions of identical conductivity, comprising the steps of; forming a base region of a semiconductor device, and introducing nucleation sites for dislocation loops by ion implanting non-dopant ions into said base region of the semiconductor device to be subsequently doped with emitter type impurity, said nucleation sites being formed near the front surface of said base region of said device, and subsequently introducing emitter type impurity into said region to form the emitter region whereby said nucleation sites are converted into small electrically harmless dislocation loops thereby reducing the number of pipes.
Claim 3
Dependent Claim
13 words
The method of claim 1 wherein said semiconductor device is an NPN transistor.
Claim 4
Dependent Claim
37 words
The method of claim 1 wherein said nucleation sites are, in addition, introduced into the base region of said semiconductor device which will remain as the base region and not be subsequently converted to an emitter region.
Claim 5
Dependent Claim
23 words
The method of claim 1 wherein said ions are selected from the group consisting of helium, neon, argon, krypton, xenon, silicon and oxygen.
Claim 6
Dependent Claim
59 words
The method of claim 1 wherein said ions are implanted through a silicon oxide layer sufficiently thin so as to permit the ions to pass through said oxide layer, but sufficiently thick to retard the energy of the ions so that the ions are implanted in the base region just below the interface of said oxide and base region.
Claim 7
Dependent Claim
29 words
The method of claim 1 wherein said ions are implanted to a depth not greater than about 25% of the depth of the emitter region which is subsequently formed.
Claim 8
Dependent Claim
10 words
The method of claim 4 wherein said ions are argon.
Claim 9
Dependent Claim
10 words
The method of claim 4 wherein said ions are silicon.
Claim 10
Dependent Claim
41 words
The method of claim 1 wherein said ions are implanted into a silicon oxide layer with sufficient energy so that upon striking silicon atoms in said layer, the silicon atoms are driven into the base region to create said nucleation sites.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-01-16 | 1981-07-18 | 1982-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-01-16 | 1985-07-18 | 1986-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-01-16 | 1989-07-18 | 1990-01-17 | $7700.00 | Window Closed / Lapsed |