Abstract A word group priority device for use in a data processing system having a first store and a relatively faster but smaller capacity second store, which device assigns priorities to word groups on a least recently used basis. Upon the read-out or read-in of a word group, (m)- bit priority codes are generated, the first (k) bits thereof serving to identify a group having the lowest priority, the further (m - k) bits serving to code all priority combinations for the groups which do not have the lowest priority. During a read, write, or replacement operation, the device can be used to lower the priority of all non-accessed word groups while assigning the highest priority to the accessed word group, and can also be used to raise the priority of all remaining word groups when one group has been invalidated by assigning to it the lowest priority.
For use with a data processing system having a processor and a storage configuration including a first store and a relatively faster second store, wherein data is organized in each of said stores in word blocks each having a predetermined number of words of data, with each of said word blocks in said second store having a relative priority at any given time assigned on the basis of the least-recently-used criterion, and the number of words in said second store being less than the number of words in said first store, the combination comprising: means for supplying from said processor the word block address of a predetermined word block for addressing individual word blocks within said first and second stores; means for storing said predetermined word block address; address store means for storing addresses of word blocks stored in said second store; comparison means for comparing said stored predetermined word block address with said addresses stored in said address store means and for producing a selecting signal on a selection line connected to said second store for selecting the addresses word block; a code generator having an input connected to said selection line and an output for generating an m-bit priority code for each of said word blocks, said code comprising k-bits for identifying the one word block having lowest priority and (m-k)-bits for coding all priority combinations for the other of said word blocks not having lowest priority, where k, m, and m-kare positive integers; means connected to said code generator for supplying from said processor a signal that a read/write operation on one of said word blocks is occurring; register means connected to said output of said code generator for storing a newly generated priority code and having a k-bit output; and decoder means having an input connected to said k-bit output of said register means and an output connected to said address store means for specifying which one of said word blocks has the lowest priority.
Claim 2
Dependent Claim
329 words
For use with a data processing system having a processor and a storage configuration including a first store and a relatively faster second store, wherein data is organized in each of said stores in word blocks each having a predetermined number of words of data, with each of said word blocks in said second store having a relative priority at any given time assigned on the basis of the least-recently-used criterion, and the number of words in said second store being less than the number of words in said first store, the combination comprising: means for supplying from said processor the word block address of a predetermined word block for addressing individual word blocks within said first and second stores; means for storing said predetermined word block address; address store means for storing addresses of word blocks stored in said second store; comparison means for comparing said stored predetermined word block address with said addresses stored in said address store means and for producing a selecting signal on a selection line connected to said second store for selecting the addresses word block; a code generator having an input connected to said selection line and an output for generating an m-bit priority code for each of said word blocks, said code comprising k-bits for identifying the one word block having lowest priority and (m-k)-bits for coding all priority combinations for the other of said word blocks not having lowest priority, where k, m, and m-kare positive integers; means connected to said code generator for supplying from said processor a signal that a read/write operation on one of said word blocks is occurring; register means connected to said output of said code generator for storing a newly generated priority code and having a k-bit output; and decoder means having an input connected to said k-bit output of said register means and an output connected to said address store means for specifying which one of said word blocks has the lowest priority.
Claim 3
Dependent Claim
18 words
A data processing system as defined in claim 1, wherein said code generator comprises a read only memory.
Claim 4
Dependent Claim
94 words
A data processing system as defined in claim 1, wherein said code generator comprises: primary selection means comprising a read only memory; means for addressing said memory and having an input connected to said register means and an output; and secondary selection means comprising logic means having an input connected to the output of said read only memory, to said selection line, and to said means connected to said code generator for supplying a signal that a read/write operation is occurring, and said secondary selection means having an output connected to said register means.
Claim 5
Dependent Claim
41 words
A data processing system as defined in claim 1, further comprising means connected to said code generator for signalling that a word block has been invalidated so that said invalidated word block is assigned the lowest priority by said code generator.