Voltage memory device

Claim 2

An analog voltage memory device comprising a. an input resistor, b. a reed relay having one contact connected to one terminal of said input resistor, c. a MOSFET having the gate thereof connected to the other contact of said reed relay, d. a nonpolarized capacitor interconnected between the gate of said MOSFET and ground, e. an output resistor interconnected between the source of said MOSFET and ground, f. a first operational amplifier having a noninverting input terminal, an inverting input terminal, and an output terminal, said source being connected to said inverting input terminal, means for applying an input signal to said noninverting input terminal, said output terminal of said first operational amplifier being connected to the other terminal of said input resistor, and g. a second operational amplifier having an inverting input terminal connected to said source, a noninverting input terminal, means for applying said input signal to said noninverting input terminal, and an output terminal coupled to a coil of said reed relay for energizing said relay only when said input voltage is higher than the voltage at said source, whereby said analog voltage memory device provides an output voltage across said output resistor whose magnitude follows the peak of said input voltage.

Claim 3

An analog voltage memory device as set forth in claim 1, further comprising a switching transistor having the control electrode thereof connected to the output terminal of said second operational amplifier and one of the main electrodes thereof connected to said relay coil.

Claim 4

An analog voltage memory device as set forth in claim 2, further comprising a diode for limiting the reverse electromotive force developed by said coil, said diode being connected in parellel with said coil of said reed relay.

Claim 5

An analog voltage memory device as set forth in claim 1 wherein the voltage across said output resistor is applied to the inverting input terminal of said first operational amplifier through a variable resistor.

Claim 6

An analog voltage memory device as set forth in claim 1 wherein the components of said analog voltage memory device are mounted on a printed circuit board, the other contact of said reed relay, one terminal of said nonpolarized capacitor and the gate of said MOSFET are joined within an opening formed through said printed circuit board in such a way that they may be kept out of contact from the edge of said opening, and said printed circuit board with said components mounted thereupon is encased in a casing and molded with high insulating resin.

Claim 7

An analog voltage memory device comprising a. an input resistor, b. a reed relay having one contact connected to one terminal of said input resistor, c. a MOSFET having its gate connected to the other contact of said reed relay, d. a nonpolarized capacitor interconnected between the gate of said MOSFET and ground, e. an output resistor interconnected between the source of said MOSFET and ground, f. an operational amplifier having an inverting input terminal coupled to the source of said MOSFET and a noninverting input terminal to which an input voltage may be applied, said operational amplifier comparing the voltage across said output resistor with the input voltage to provide an amplified difference signal at an output terminal thereof, said output terminal being connected to the other terminal of said input resistor, the components of said analog voltage memory device being mounted on a printed circuit board, said other contact of said reed relay, one terminal of said capacitor and the gate of said MOSFET being joined in an opening formed through said printed circuit board in such a way that they are kept out of contact from the edge of said opening, said printed circuit board with said components mounted thereupon being encased in a casing and molded with high insulating resin, whereby said analog voltage memory device provides said voltage across said output resistor having a magnitude which closely follows the level of said input voltage.

Claim 8

An analog voltage memory device comprising a. an input resistor, b. a reed relay having one contact connected to one terminal of said input resistor, c. a MOSFET having its gate connected to the other contact of said reed relay, d. a nonpolarized capacitor interconnected between the gate of said MOSFET and ground, e. an output resistor interconnected between the source of said MOSFET and ground, f. an operational amplifier having an inverting input terminal coupled to the source of said MOSFET and a noninverting input terminal to which an input voltage may be applied, said operational amplifier comparing the voltage across said output resistor with the input voltage to provide an amplified difference signal at an output terminal thereof, said output terminal being connected to the other terminal of said input resistor, the components of said analog voltage memory device being mounted on a printed circuit board, said other contact of said reed relay, one terminal of said capacitor and the gate of said MOSFET being joined in an opening formed through said printed circuit board in such a way that they are kept out of contact from the edge of said opening, said printed circuit board with said components mounted thereupon being encased in a casing and molded with high insulating resin, whereby said analog voltage memory device provides said voltage across said output resistor having a magnitude which closely follows the level of said input voltage.

Claim 9

An analog voltage memory device as set forth in claim 6, wherein the voltage across said output resistor is applied through a variable resistor to said inverting terminal of said operational amplifier.