Universal differential line driver integrated circuit

Claim 2

In a line driver circuit of the type having a single polarity binary signal input and having two binary signal outputs capable of selectively assuming one of four conditions, said circuit comprising: a. first logic means responsive to said binary signal input for providing an inverted binary signal output at a first output terminal; b. second logic means responsive to said binary signal input for providing a non-inverted binary signal output at a second output terminal electrically isolated from said first output terminal, each of said logic means including current sourcing and sinking means at its respective output terminal; and c. control logic means connected to said first and second logic means for selectively operating on said current sourcing and sinking means so that they assume one of the following alternative conditions:

Claim 3

a first condition in which the current sourcing and current sinking means of both said first and second logic means are disabled whereby each binary signal output exhibits a high impedance state; 2. a second condition in which both of said current sourcing and current sinking means are enabled whereby each signal output provides, respectively, non-inverted and inverted single polarity replicas of the binary signal input; 3. a third condition in which the current sourcing means of said first logic means and the current sinking means of said second logic means are enabled while the respective current sinking and current sourcing means thereof are disabled; or 4. a fourth condition which is the inverse of said third condition; d. said third and fourth conditions resulting in an operational mode in which both binary signal outputs in combination provide a two polarity differential output.

Claim 4

a first condition in which the current sourcing and current sinking means of both said first and second logic means are disabled whereby each binary signal output exhibits a high impedance state; 2. a second condition in which both of said current sourcing and current sinking means are enabled whereby each signal output provides, respectively, non-inverted and inverted single polarity replicas of the binary signal input; 3. a third condition in which the current sourcing means of said first logic means and the current sinking means of said second logic means are enabled while the respective current sinking and current sourcing means thereof are disabled; or 4. a fourth condition which is the inverse of said third condition; d. said third and fourth conditions resulting in an operational mode in which both binary signal outputs in combination provide a two polarity differential output.

Claim 5

The invention according to claim 1 wherein said current sourcing means and said current sinking means comprise active pull-up and pull-down circuits respectively.

Claim 6

The invention according to claim 2 wherein said pull-up and pull-down circuits comprise bipolar transistors.

Claim 7

The invention according to claim 3, wherein said line driver circuit is embodied in integrated circuit form.

Claim 8

The invention according to claim 4 wherein said line driver circuit includes Schottky type transistors.