Patent US4039857A successfully refreshed from Google Patents.
US4039857A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dynamic biasing of isolation boat including diffused resistors
Assignee: RCA Licensing Corp
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Filing: 1975-04-10
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Granted: 1977-08-02
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Expires: 1995-04-10
Abstract
Abstract A diode current steering network is fabricated in minimum area in a monolithic integrated circuit by dynamically biasing an isolation boat wherein are contained diffused resistors connected to the various circuit points to which current is to be steered.
Inventors
- 👤 Adel Abdel Aziz Ahmed
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:46
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209; H03; H03K; H03K19/00; H03K19/003; H03K19/00307; H03K19/02; H03K19/08; H03K19/082; H03K19/086; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/52; H04Q3/521; H10D84/60; H10D84/611; H10D84/613; H10D89/00; H10D89/211; H10D89/311
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
202 words
Apparatus comprising: first and second regions being of opposite types of semiconductor material and having a semiconductor junction therebetween, said first region being provided with an ohmic contact, said second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein defining the ends of a resistive path through said second region; means exhibiting a source impedance relatively small compared to the resistance of aid resistive path, for continually applying a potential to the first ohmic contact of said second region; means exhibiting source a source relatively large compared to the resistance of said resistive paths, for selectively applying a first current to the second ohmic contact of said second region; means for selectively diverting a portion of said first current to the ohmic contact of said first region to cause conduction between said first region and said second region along at least a portion of said semiconductor juntion therebetween, the portion of said semi-conductor junction that is conductive being related to the portion of said first current that is diverted; and means for utilizing the resulting potential appearing between the first and second ohmic contacts of said second region.
Claim 2
Dependent Claim
202 words
Apparatus comprising: first and second regions being of opposite types of semiconductor material and having a semiconductor junction therebetween, said first region being provided with an ohmic contact, said second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein defining the ends of a resistive path through said second region; means exhibiting a source impedance relatively small compared to the resistance of aid resistive path, for continually applying a potential to the first ohmic contact of said second region; means exhibiting source a source relatively large compared to the resistance of said resistive paths, for selectively applying a first current to the second ohmic contact of said second region; means for selectively diverting a portion of said first current to the ohmic contact of said first region to cause conduction between said first region and said second region along at least a portion of said semiconductor juntion therebetween, the portion of said semi-conductor junction that is conductive being related to the portion of said first current that is diverted; and means for utilizing the resulting potential appearing between the first and second ohmic contacts of said second region.
Claim 3
Dependent Claim
302 words
Apparatus comprising: a first region of a first type of semiconductor material, second and third regions of a second type of semiconductor material, said second and third regions each being separate from the other and adjoining the first region to form respective semiconductor junctions therewith, first and second ohmic contacts to different portions of said second region for defining the ends of a resistive path through said second region, a third ohmic contact to said third region, a fourth region being of said first type of semiconductor material and having a semiconductor junction with said third region alone of the aforesaid regions and a fourth ohmic contact to said fourth region, said first and said third and said fourth regions respectively forming the collector and the base and the emitter regions of the transistors, one of said first and said second types being N-type and the other P-type; means for applying a first potential which means has a source impedance relatively small compared to the resistance of said resistive path, and which means is connected to said first ohmic contact and applies its potential thereto; means for selectively applying a first current which means has a source impedance relatively large compared to the resistance of said resistive path, and which means is connected to said second ohmic contact and applies its current thereto; means for selectively applying a second current, which means is connected between said third and fourth ohmic contacts in a poling such that said second current forward biases the semiconductor junction between said third and fourth regions; means for connecting at least one of said third and said fourth ohmic contacts to said first ohmic contact; and means for utilizing potential appearing between the first and second ohmic contacts of said region responsive to said first and second currents.
Claim 4
Dependent Claim
302 words
Apparatus comprising: a first region of a first type of semiconductor material, second and third regions of a second type of semiconductor material, said second and third regions each being separate from the other and adjoining the first region to form respective semiconductor junctions therewith, first and second ohmic contacts to different portions of said second region for defining the ends of a resistive path through said second region, a third ohmic contact to said third region, a fourth region being of said first type of semiconductor material and having a semiconductor junction with said third region alone of the aforesaid regions and a fourth ohmic contact to said fourth region, said first and said third and said fourth regions respectively forming the collector and the base and the emitter regions of the transistors, one of said first and said second types being N-type and the other P-type; means for applying a first potential which means has a source impedance relatively small compared to the resistance of said resistive path, and which means is connected to said first ohmic contact and applies its potential thereto; means for selectively applying a first current which means has a source impedance relatively large compared to the resistance of said resistive path, and which means is connected to said second ohmic contact and applies its current thereto; means for selectively applying a second current, which means is connected between said third and fourth ohmic contacts in a poling such that said second current forward biases the semiconductor junction between said third and fourth regions; means for connecting at least one of said third and said fourth ohmic contacts to said first ohmic contact; and means for utilizing potential appearing between the first and second ohmic contacts of said region responsive to said first and second currents.
Claim 5
Independent Claim
183 words
A method of operating a monolithic integrated circuit comprising first and second adjoining regions, said first and said second regions being each of a semiconductor material and having a semiconductor junction therebetween, the second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region, said method comprising the steps of: continually applying a potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively forward biasing at least a portion of said semiconductor junction thereby to divert at least a portion of the applied current from said second region to said first region; and utilizing the resulting potential appearing between the first and second contacts of said second region.
Claim 6
Independent Claim
183 words
A method of operating a monolithic integrated circuit comprising first and second adjoining regions, said first and said second regions being each of a semiconductor material and having a semiconductor junction therebetween, the second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region, said method comprising the steps of: continually applying a potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively forward biasing at least a portion of said semiconductor junction thereby to divert at least a portion of the applied current from said second region to said first region; and utilizing the resulting potential appearing between the first and second contacts of said second region.
Claim 7
Independent Claim
218 words
A method of operating a monolithic integrated circuit comprising first and second adjoining regions, said first and said second regions being each of semiconductor material and having a semiconductor junction therebetween, the second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region, said method comprising the steps of: continually applying a first potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a first current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively diverting a portion of said first current to the ohmic contact of said first region thereby to forward bias at least a portion of the semiconductor junction between first and said second regions; and utilizing the potential appearing between the first and second contacts of said second region resulting from the conduction across a portion of said semiconductor junction, which portion is determined by the portion of said first current diverted to the ohmic contact of said first region.
Claim 8
Independent Claim
218 words
A method of operating a monolithic integrated circuit comprising first and second adjoining regions, said first and said second regions being each of semiconductor material and having a semiconductor junction therebetween, the second region being disposed as an island in said first region and being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region, said method comprising the steps of: continually applying a first potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a first current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively diverting a portion of said first current to the ohmic contact of said first region thereby to forward bias at least a portion of the semiconductor junction between first and said second regions; and utilizing the potential appearing between the first and second contacts of said second region resulting from the conduction across a portion of said semiconductor junction, which portion is determined by the portion of said first current diverted to the ohmic contact of said first region.
Claim 9
Independent Claim
304 words
A method of operating a monolithic integrated circuit comprising a first region of a first type of semiconductor material; and second and third regions, said second and said third regions being each of a second type of semiconductor material and having respective semiconductor junctions with said first region which they separately adjoin, said second region being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region; said third region being provided with an ohmic contact; and a fourth region being of said first type of semiconductor material, having a semiconductor junction with said third region alone of the aforesaid regions and being provided with an ohmic contact, one of said first and said second types being N-type and the other P-type, said method comprising the steps of: continually applying a potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a fist current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively applying a second current between the ohmic contacts of said third and said fourth regions, in a direction to forward bias said semiconductor junction between said third and fourth regions, and at a relative potential, as referred to said potential applied to the first ohmic contact of said second region to cause transistor action of said third and fourth regions together with said first region thereby to forward bias at least a portion of the semiconductor junction between said first and said second regions; and utilizing the resulting potential appearing between the first and second contacts of said second region.
Claim 10
Independent Claim
304 words
A method of operating a monolithic integrated circuit comprising a first region of a first type of semiconductor material; and second and third regions, said second and said third regions being each of a second type of semiconductor material and having respective semiconductor junctions with said first region which they separately adjoin, said second region being provided with first and second ohmic contacts at different points therein for defining the ends of a resistive path through said second region; said third region being provided with an ohmic contact; and a fourth region being of said first type of semiconductor material, having a semiconductor junction with said third region alone of the aforesaid regions and being provided with an ohmic contact, one of said first and said second types being N-type and the other P-type, said method comprising the steps of: continually applying a potential to the first ohmic contact of said second region from a source which exhibits a source impedance relatively small compared to the resistance of said resistive path; selectively applying a fist current to the second ohmic contact of said second region from a source which exhibits a source impedance relatively large compared to the resistance of said resistive path; selectively applying a second current between the ohmic contacts of said third and said fourth regions, in a direction to forward bias said semiconductor junction between said third and fourth regions, and at a relative potential, as referred to said potential applied to the first ohmic contact of said second region to cause transistor action of said third and fourth regions together with said first region thereby to forward bias at least a portion of the semiconductor junction between said first and said second regions; and utilizing the resulting potential appearing between the first and second contacts of said second region.
Claim 11
Dependent Claim
117 words
Apparatus as set forth in claim 1 wherein said means for selectively diverting a portion of said first potential includes: a first transistor having an emitter region with an emitter electrode galvanically connected to said means for continually applying a potential, having a collector region with a collector electrode galvanically connected to the ohmic contact of said first region, and having a base region with a base electrode; and means for applying a signal between the base and emitter electrodes of said first transistor for controlling the collector current demand thereof, which collector current demand is satisfied at least in part by said portion of said first current diverted from said second region to said first region.
Claim 12
Dependent Claim
155 words
Apparatus as set forth in claim 1 wherein said means for utilizing potential appearing between the first and second ohmic contacts of said second region and said means for selectively diverting a portion of said first current together include: a first transistor having an emitter electrode with an emitter electrode galvanically connected to said means for continually applying a potential, having a collector region with a collector electrode galvanically connected to the ohmic contact of said first region, and having a base region with a base electrode; at least one further transistor having an emitter region with an emitter electrode galvanically connected to the base electrode of said first transistor, having a collector region with a collector electrode, and having a base region with a base electrode to which the second ohmic contact of said second region is galvanically connected; and an output terminal to which each said further transistor has its collector electrode connected.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-08-01 | 1981-01-31 | 1981-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-08-01 | 1985-01-31 | 1985-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-08-01 | 1989-01-31 | 1989-08-02 | $7700.00 | Window Closed / Lapsed |