Memory device with shift register usable as dynamic or static shift register

Claim 1

An information memory device for storing a plural bit data character, comprising: a shift register which includes a plurality of cascade connected register units, each register unit having a number N of sequentially arranged memory elements capable of storing digital information, and a number N of sequentially arranged transfer elements respectively coupled to said N memory elements, each of said memory elements and transfer elements being responsive to a supplied shift pulse for transferring digital information stored in a memory element to another memory element via a transfer element, N being larger by one than the number of bits in one data character; shift pulse generating means for supplying a shift pulse of the same phase to the transfer elements occupying the same sequential position in the respective register units and a number N of shift pulses having different phases to the transfer elements of each register unit from the transfer element disposed on the output side of said register unit; shift circulation means coupled to said register units for causing an output delivered from the output terminal of each register unit to circulate through the input terminal of said register unit; and input information changeover means including gating means coupled to the input terminal of each register unit for either supplying fresh information to the shift register in order to cause said shift register to act as a dynamic type shift register or circulating information already supplied through said shift circulation means to cause said shift register to act as a static type shift register.