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US4032796A Expired / Lapsed US ⏱️ 0.0 years remaining

Logic dot-and gate circuits

Assignee: Samsung Electronics Co Ltd
•
Filing: 1976-03-26
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Granted: 1977-06-28
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Expires: 1996-03-26
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Abstract

Abstract A logic family is provided capable of accomplishing a logic function for each transistor used, i.e. one transistor per logic gate. A plurality of logic gate types are shown, each capable of a different logic function. These logic gate types can be connected with one another to provide the "DOT--AND" logic function.

Inventors

  • 👤 David E. Fulkerson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 11:20
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/10; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/02; H03K19/08; H03K19/082

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 156 words
A circuit for performing logical functions including a "DOT--AND" function, said circuit comprising: a non-inverting bipolar transistor having a non-inverting transistor base, a non-inverting transistor collector and a plurality of non-inverting transistor emitters therein, said non-inverting transistor emitters, including a first non-inverting transistor emitter, being inputs to receive signals from sources of signals excepting those said non-inverting transistor emitters which are directly connected to said non-inverting transistor base including a second non-inverting transistor emitter so connected; an inverting bipolar transistor having an inverting transistor collector, inverting transistor emitter and a plurality of inverting transistor bases therein, said inverting transistor bases being inputs to receive signals from sources of signals, said inverting transistor collector being directly connected to said non-inverting transistor collector; and a first resistor connected between said non-inverting transistor base and a first terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said "DOT--AND" function is provided.
Claim 2
Dependent Claim 156 words
A circuit for performing logical functions including a "DOT--AND" function, said circuit comprising: a non-inverting bipolar transistor having a non-inverting transistor base, a non-inverting transistor collector and a plurality of non-inverting transistor emitters therein, said non-inverting transistor emitters, including a first non-inverting transistor emitter, being inputs to receive signals from sources of signals excepting those said non-inverting transistor emitters which are directly connected to said non-inverting transistor base including a second non-inverting transistor emitter so connected; an inverting bipolar transistor having an inverting transistor collector, inverting transistor emitter and a plurality of inverting transistor bases therein, said inverting transistor bases being inputs to receive signals from sources of signals, said inverting transistor collector being directly connected to said non-inverting transistor collector; and a first resistor connected between said non-inverting transistor base and a first terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said "DOT--AND" function is provided.
Claim 3
Dependent Claim 28 words
The circuit of claim 1 wherein a second resistor is connected between said non-inverting transistor collector and a second terminal means adapted for connection to a voltage source.
Claim 4
Dependent Claim 28 words
The circuit of claim 1 wherein a third resistor is connected between said inverting transistor emitter and a third terminal means adapted for connection to a voltage source.
Claim 5
Dependent Claim 16 words
The circuit of claim 2 wherein said second terminal means is also said first terminal means.
Claim 6
Dependent Claim 28 words
The circuit of claim 2 wherein a third resistor is connected between said inverting transistor emitter and a third terminal means adapted for connection to a voltage source.
Claim 7
Dependent Claim 16 words
The circuit of claim 5 wherein said second terminal means is also said first terminal means.
Claim 8
Dependent Claim 23 words
The circuit of claim 5 wherein a Schottky diode is connected from one of said inverting transistor bases to said inverting transistor collector.

References Cited (Backward Citations)

US3233125A Cited
US3414783A Cited
US3560761A Cited
US3571616A Cited
US3699362A Cited
US3790817A Cited
US3751680A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-06-27 1980-12-27 1981-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-06-27 1984-12-27 1985-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-06-27 1988-12-27 1989-06-28 $7700.00 Window Closed / Lapsed

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