Patent US2614140A successfully refreshed from Google Patents.
US3751680A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Double-clamped schottky transistor logic gate circuit
Assignee: Signetics Corp
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Filing: 1972-03-02
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Granted: 1973-08-07
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Expires: 1992-03-02
Abstract
Abstract A double-clamped Schottky transistor logic gate circuit which includes a totem pole output with Schottky clamp transistors with the pull-down transistor supplying a stable low output level and the pull-up transistor provides a high stable output level voltage by use of a negative feedback arrangement which includes level shifting Schottky diodes and a second Schottky clamp transistor to control the current to the pull-up transistor. An output gating arrangement utilizing Schottky diodes provides reduced capacitances and chip area by placing the cathode of the diode in the same isolated integrated semiconductor regions as the collector of the pull-down transistor. In addition, temperature compensation is provided and noise immunity is improved by integrating a voltage regulator into the same integrated circuit.
Inventors
- 👤 D Hodges
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 05:40
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/617; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/02; H03K19/08; H03K19/082; H03K19/086
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
151 words
A gate circuit having an output terminal switchable between two levels in response to a bi-level input signal on an input terminal said circuit comprising: a totem pole arrangement including a pair of series connected Schottky clamped transistors the first acting as a pull-up and the second a pull-down transistor the common connection between the emitter and collector of said transistors providing said output terminal, phase-splitting OR gate means for driving the base inputs of said transistors in a complementary manner said OR gate means having two activating inputs the first input being responsive to a high bi-level input signal for placing said pull-down transistor in conduction and holding off said pull-up transistor, the second input being responsive during a low bi-level input signal to said first input to a feedback signal from said output terminal for controlling said pull-up transistor to maintain said output terminal at a predetermined voltage level.
Claim 2
Dependent Claim
151 words
A gate circuit having an output terminal switchable between two levels in response to a bi-level input signal on an input terminal said circuit comprising: a totem pole arrangement including a pair of series connected Schottky clamped transistors the first acting as a pull-up and the second a pull-down transistor the common connection between the emitter and collector of said transistors providing said output terminal, phase-splitting OR gate means for driving the base inputs of said transistors in a complementary manner said OR gate means having two activating inputs the first input being responsive to a high bi-level input signal for placing said pull-down transistor in conduction and holding off said pull-up transistor, the second input being responsive during a low bi-level input signal to said first input to a feedback signal from said output terminal for controlling said pull-up transistor to maintain said output terminal at a predetermined voltage level.
Claim 3
Dependent Claim
55 words
A gate circuit as in claim 1 together with output gating means including a plurality of Schottky diodes with means for connecting their cathodes in common and to said output terminal said connecting means includes a common isolated collector region of one of said pair of transistors which is a portion of an integrated circuit.
Claim 4
Dependent Claim
62 words
A gate circuit as in claim 1 together with a semiconductor substrate into which such circuit is integrated said circuit including voltage regulator means integrated into said substrate for reducing the standard TTL power supply voltage of +5 volts to substantially +3.5 volts said regulator including means for providing a net temperature coefficient to compensate the temperature coefficient of said gate circuit.
Claim 5
Dependent Claim
47 words
A gate circuit as in claim 3 where said temperature coefficient means includes a transistor coupled to said 5 volt supply and a series string of five PN junction diodes coupled to the base of said transistor to provide a net temperature coefficient of four PN junctions.
Claim 6
Dependent Claim
67 words
A gate circuit as in claim 1 where said OR gate means includes a pair of Schottky clamped transistors with their collectors tied together and coupled to the base of said pull-up transistor and with their emitters tied together and coupled to the base of said pull-down transistor the base inputs of said pair of transistors in said OR gate serving as said first and second inputs.
Claim 7
Dependent Claim
36 words
A gate circuit as in claim 5 in which a first negative feedback path for controlling said pull-up transistor includes said OR gate transistor which provides said second input said output terminal and said pull-up transistor.
Claim 8
Dependent Claim
27 words
A gate circuit as in claim 6 where a second negative feedback path is formed by such OR gate transistor said pull-down transistor and said output terminal.
Claim 9
Dependent Claim
37 words
A gate circuit as in claim 7 where said second negative feedback path includes a Schottky diode series connected between the emitter of such OR gate transistor and said pull-down transistor and serving as a level shifter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-06 | 1977-02-05 | 1977-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-06 | 1981-02-05 | 1981-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-06 | 1985-02-05 | 1985-08-07 | $7700.00 | Window Closed / Lapsed |