Patent US4023097A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4023097A Expired / Lapsed US ⏱️ 0.0 years remaining

Noise and dielectric absorption compensation circuit

Assignee: Datatron Inc
•
Filing: 1975-11-21
•
Granted: 1977-05-10
•
Expires: 1995-11-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The following specification discloses a current noise and dielectric absorption kickback compensation circuit for a force line and a sense line that are to be initially compensated with regard to unwanted currents therein. The lines are placed in a shielded cable and mutually receive the same external noise signals. The unwanted currents are incurred in the force line and the sense line which is connected to a device under test, such as an integrated circuit, that is to have a particular voltage forced thereon and a determination made or sensed as to the current drain thereof. The force and sense lines can be initially connected to a tester which is controlled by a computer. The lines lead to the device under test through various lines interconnected by relay matrices which provide a number of different functions for testing the device under test, such as timed events, voltages, and external active or passive elements used cooperatively with the device under test and the other pins thereof. The invention compensates for spurious signals which are mutually incurred on the force and sense lines through dielectric absorption kickback and noise generated thereon, such as sixty cycle ambient noise. The compensation is effectuated by the sense line being clear of any driven signals thereon. This allows the provision of any spurious currents thereon to an amplifier having a zero reference point. The foregoing amplifier of the sense line has its output connected to an inverted reference of the input of a force line amplifier. This places the spurious respective currents on the force and sense lines in diametrically opposed equal values for purposes of providing a null on the two respective lines, inasmuch as they both receive the same approximate dielectric and noise factors. The nulling effect compensates for noise, and dielectric absorption kickback that is caused by the switching matrices and the ambient noise, so that a true current reading on the force line can take place as to any current thereon that relates to the device under test.

Inventors

  • 👤 Richard Emil Hanashey

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 07:40
CPC Classifications
G; G01; G01R; G01R17/00; G01R17/02; G01R17/06; G01R31/00; G01R31/28; G01R31/316

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 161 words
A circuit to compensate for spurious signals such as current noise and dielectric absorption kickback generated through voltage changes within a pair of lines mutually connected to a load that is to be tested as to its response to certain signals impressed thereon comprising: a first force line connected to said load under test upon which a signal is impressed; a second sense line upon which a signal is to be sensed in the form of a current emanating from said load; a first operational amplifier having a connection to the force line; and, a second operational amplifier for receiving the current from the sense line and having a zero reference point, with an output connected to the reference of the first amplifier and opposite from the input of said first operational amplifier in order to null any spurious signals on the two respective lines to provide an output directly proportional to the current on the sense line from the load.
Claim 2
Dependent Claim 161 words
A circuit to compensate for spurious signals such as current noise and dielectric absorption kickback generated through voltage changes within a pair of lines mutually connected to a load that is to be tested as to its response to certain signals impressed thereon comprising: a first force line connected to said load under test upon which a signal is impressed; a second sense line upon which a signal is to be sensed in the form of a current emanating from said load; a first operational amplifier having a connection to the force line; and, a second operational amplifier for receiving the current from the sense line and having a zero reference point, with an output connected to the reference of the first amplifier and opposite from the input of said first operational amplifier in order to null any spurious signals on the two respective lines to provide an output directly proportional to the current on the sense line from the load.
Claim 3
Dependent Claim 26 words
The circuit as claimed in claim 1 wherein: The first line and said sense line are within a shielded cable to effectuate a similar electrical environment.
Claim 4
Dependent Claim 15 words
The circuit as claimed in claim 2 wherein: said shielded cable is connected to ground.
Claim 5
Dependent Claim 43 words
The circuit as claimed in claim 3 further comprising: means for receiving given analog signals; a voltage drive amplifier connected to said means and to the input terminal of said first operational amplifier; and, a voltage buffer amplifier placed within the first line.
Claim 6
Dependent Claim 53 words
The circuit as claimed in claim 1 further comprising: a comparator connected to the output of said first operational amplifier and to a signal source that is to provide a comparison voltage to provide an output that is the error status between the comparison voltage and the output of said first operational amplifier.
Claim 7
Dependent Claim 56 words
The circuit as claimed in claim 5 further comprising: an integrated circuit tester connected to the first line which is a force line and to said sense line wherein said force and sense lines are adapted for connection to an integrated circuit for comparing the respective currents flowing therefrom after a voltage has been forced thereon.
Claim 8
Dependent Claim 86 words
The circuit as claimed in claim 6 further comprising: N number of stations adapted to receive an integrated circuit to be connected to the force and the sense lines respectively for test; a relay matrix interposed between the tester and the stations for purposes of switching the tester and the force and sense lines to the respective stations for testing a plurality of different integrated circuits; and, a forcing and measurement sequential mode circuit for providing driven voltages to the force line through the relay matrix.
Claim 9
Dependent Claim 229 words
A tester for testing devices such as integrated circuits wherein a given voltage is applied to a device under test and a determination is made as to the amount of current flowing therefrom wherein the improvement comprises: a force line adapted for connection to the device under test to impose or force the given voltage thereon; a sense line for sensing the unwanted amount of current from the device under test; a cable in which said force and sense lines are maintained; an electronic circuit means connected to said force line for providing a pre-established voltage thereon; N number of stations for receiving a device to be tested for adapted connection to the force and sense line; a relay matrix for connecting the circuit means for providing the voltage to the respective stations for testing the device to be tested; an operational amplifier connected to the force line having a given input and reference; and, a second operational amplifier connected to the sense line having an output and a zero reference, wherein the output is connected to the reference of the first operational amplifier so that spurious signals on the force and the sense line are nullified by the respective inputs being opposite from each other so that only the proper current that is flowing from the device under test is seen rather than any spurious currents and signals.
Claim 10
Dependent Claim 229 words
A tester for testing devices such as integrated circuits wherein a given voltage is applied to a device under test and a determination is made as to the amount of current flowing therefrom wherein the improvement comprises: a force line adapted for connection to the device under test to impose or force the given voltage thereon; a sense line for sensing the unwanted amount of current from the device under test; a cable in which said force and sense lines are maintained; an electronic circuit means connected to said force line for providing a pre-established voltage thereon; N number of stations for receiving a device to be tested for adapted connection to the force and sense line; a relay matrix for connecting the circuit means for providing the voltage to the respective stations for testing the device to be tested; an operational amplifier connected to the force line having a given input and reference; and, a second operational amplifier connected to the sense line having an output and a zero reference, wherein the output is connected to the reference of the first operational amplifier so that spurious signals on the force and the sense line are nullified by the respective inputs being opposite from each other so that only the proper current that is flowing from the device under test is seen rather than any spurious currents and signals.
Claim 11
Dependent Claim 39 words
The circuit as claimed in claim 8 further comprising: a voltage drive amplifier connected to the input of said first operational amplifier; and, a voltage buffer connected between the force line and the reference of said first operational amplifier;
Claim 12
Dependent Claim 39 words
The tester as claimed in claim 9 further comprising: drivers for respective pins other than the particular pin that is to be provided with a forced voltage; and, relay means for connecting the drivers to the other respective pins.
Claim 13
Dependent Claim 30 words
The circuit as claimed in claim 10 further comprising: N number of relays for multiplexing different respective stations that are to be served by the respective force and sense lines.
Claim 14
Dependent Claim 36 words
The circuit as claimed in claim 10 further comprising: a forcing and measurement sequential mode circuit within said tester to provide a forced voltage on the force line and means to control the voltage provided thereby.
Claim 15
Dependent Claim 73 words
The tester as claimed in claim 12 wherein the control means for the driven voltage comprises: a computer; and, wherein a comparator is connected to the output of said first operational amplifier at its input and a means for generating a comparison voltage from said computer to provide an output from said comparator which relates to the error status between the input from the computer and the output from said first operational amplifier.
Claim 16
Dependent Claim 33 words
The circuit as claimed in claim 13 further comprising: a variable resistance within each one of the respective force and sense lines for providing various readings with respect to a device under test.

References Cited (Backward Citations)

US3525052A Cited
US3605012A Cited
US3718910A Cited
US3825854A Cited
US3781869A Cited
US3906384A Cited
US3936759A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-05-09 1980-11-08 1981-05-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-05-09 1984-11-08 1985-05-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-05-09 1988-11-08 1989-05-10 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag