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US4016587A Expired / Lapsed US ⏱️ 0.0 years remaining

Raised source and drain IGFET device and method

Assignee: International Business Machines Corp
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Filing: 1974-12-03
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Granted: 1977-04-05
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Expires: 1994-12-03
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Abstract

Abstract Disclosed is an integrated circuit field effect transistor having a source and drain which protrude above the silicon substrate so as to create shallow junctions with the substrate while maintaining a relatively low sheet resistivity in the region. Two self-aligned source and drain fabrication processes are disclosed for the device. The first process yields a polysilicon field shield and the second process yields a field region composed of thermal silicon dioxide.

Inventors

  • 👤 Francisco H. De La Moneda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 06:24
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0275; H10D30/60; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; Y; Y10; Y10S; Y10S257/00; Y10S257/90

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 197 words
An insulated gate field effect transistor comprising: a silicon substrate of a first conductivity type having a surface; a first epitaxial region of a second conductivity type, grown on said surface of said substrate so as to project above said surface; a second epitaxial region of said second conductivity type, grown on said surface of said substrate so as to project above said substrate and be spaced from said first epitaxial region; a first insulating layer on the surface of said substrate and located between said first and said second epitaxial regions; a first conductive layer deposited over said first insulating layer; said first epitaxial region serving as the source, said second epitaxial region serving as the drain, and said conductivity layer serving as the gate of an insulated gate field effect transistor; a second insulating layer substantially thicker than said first insulating layer, separating said first conductive layer from said first and second epitaxial regions, for reducing the source-to-gate and drain-to-gate capacitance; said first and second epitaxial regions forming shallow P-N junctions with said substrate whereby the resulting IGFET device has a low junction capacitance and the source and drain regions have a low sheet resistivity.
Claim 2
Dependent Claim 197 words
An insulated gate field effect transistor comprising: a silicon substrate of a first conductivity type having a surface; a first epitaxial region of a second conductivity type, grown on said surface of said substrate so as to project above said surface; a second epitaxial region of said second conductivity type, grown on said surface of said substrate so as to project above said substrate and be spaced from said first epitaxial region; a first insulating layer on the surface of said substrate and located between said first and said second epitaxial regions; a first conductive layer deposited over said first insulating layer; said first epitaxial region serving as the source, said second epitaxial region serving as the drain, and said conductivity layer serving as the gate of an insulated gate field effect transistor; a second insulating layer substantially thicker than said first insulating layer, separating said first conductive layer from said first and second epitaxial regions, for reducing the source-to-gate and drain-to-gate capacitance; said first and second epitaxial regions forming shallow P-N junctions with said substrate whereby the resulting IGFET device has a low junction capacitance and the source and drain regions have a low sheet resistivity.
Claim 3
Dependent Claim 20 words
The insulated gate field effect transistor device of claim 1, wherein said first insulating layer is composed of silicon dioxide.
Claim 4
Dependent Claim 19 words
The insulated gate field effect transistor device of claim 1, wherein said conductive layer is composed of polycrystalline silicon.
Claim 5
Dependent Claim 68 words
The insulated gate field effect transistor device of claim 1 which further comprises: a third insulating layer formed on the surface of said substrate in the region surrounding said source, gate and drain; a second conductive layer formed over said third insulating layer; whereby said second conductive layer serves as a field shield which is biased so as to prevent charge inversion in said surface of said substrate.
Claim 6
Dependent Claim 20 words
The insulated gate field effect transistor device of claim 4 wherein said third insulating layer is composed of silicon dioxide.
Claim 7
Dependent Claim 19 words
The insulated gate field effect transistor of claim 4 wherein said second conductive layer is composed of polycrystalline silicon.
Claim 8
Dependent Claim 71 words
The insulated gate field effect transistor device of claim 1 which further comprises: the portion of said surface of said substrate between said first epitaxial region and the proximate edge of said conductive layer and between said second epitaxial region and the proximate edge of said conductive layer, being beneath said second insulating layer, doped with said second conductivity type; whereby said source and said drain are self-aligned with said gate.
Claim 9
Dependent Claim 36 words
The insulated gate field effect transistor of claim 1, which further comprises: a third insulating layer formed on the surface of said substrate and surrounding the area occupied by said source, said gate, and said drain.
Claim 10
Dependent Claim 38 words
The insulated gate field effect transistor device of claim 8 which further comprises: a first polycrystalline silicon conductor formed over said third insulating layer and connected to said first epitaxial region, to serve as an electrical contact therefor.
Claim 11
Dependent Claim 38 words
The insulated gate field effect transistor device of claim 9 which further comprises: a second polycrystalline silicon conductor formed over said third insulating layer and connected to said second epitaxial region, to serve as an electrical contact therefor.
Claim 12
Dependent Claim 25 words
The insulated gate field effect transistor device of claim 10 wherein said conductive layer deposited over said first insulating layer is composed of polycrystalline silicon.
Claim 13
Dependent Claim 20 words
The insulated gate field effect transistor device of claim 11 wherein said first insulating layer is composed of silicon dioxide.

References Cited (Backward Citations)

US3747203A Cited
US3652907A Cited
US3652905A Cited
US3764413A Cited
US3711753A Cited
US3750268A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-04-04 1980-10-04 1981-04-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-04-04 1984-10-04 1985-04-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-04-04 1988-10-04 1989-04-05 $7700.00 Window Closed / Lapsed

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