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US4015279A Expired / Lapsed US ⏱️ 0.0 years remaining

Edgeless transistor

Assignee: RCA Corp
•
Filing: 1975-05-27
•
Granted: 1977-03-29
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Expires: 1995-05-27
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Abstract

Abstract An MOS mesa transistor wherein the sidewalls of the mesa are electrically isolated from a device formed on the principal surface of the mesa, is provided. The mesa is comprised of a source and a drain which do not extend to a sidewall of the mesa. The source and the drain are surrounded by a band of semiconductor material which is a portion of the mesa and which electrically isolates the source and the drain from the sidewalls of the mesa.

Inventors

  • 👤 William Edward Ham

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 07:49
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6706; H10D86/00; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/137; H10W74/141; Y; Y10; Y10S; Y10S148/00; Y10S148/15

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 155 words
A transistor comprising a semiconductor mesa with a principal surface, the surface having a region thereunder, sidewalls surrounding the region, a source, a drain, a channel consisting of the semiconductor between the source and the drain, separating the source from the drain, said source and said drain being portions of said region containing doping in addition to the doping in the remainder of said region, a dielectric on the principal surface adjacent the channel, a gate electrode spaced above the channel by the dielectric, and a portion of the mesa undoped by source and drain additional doping containing only impurities of a single type located between the sidewalls and the region, separating the sidewalls from the region and any junctions between the source and channel and between the drain and the channel, the region comprising the source, the drain, and the channel, the portion comprising a band of the semiconductor, the band encircling the region.
Claim 2
Dependent Claim 155 words
A transistor comprising a semiconductor mesa with a principal surface, the surface having a region thereunder, sidewalls surrounding the region, a source, a drain, a channel consisting of the semiconductor between the source and the drain, separating the source from the drain, said source and said drain being portions of said region containing doping in addition to the doping in the remainder of said region, a dielectric on the principal surface adjacent the channel, a gate electrode spaced above the channel by the dielectric, and a portion of the mesa undoped by source and drain additional doping containing only impurities of a single type located between the sidewalls and the region, separating the sidewalls from the region and any junctions between the source and channel and between the drain and the channel, the region comprising the source, the drain, and the channel, the portion comprising a band of the semiconductor, the band encircling the region.
Claim 3
Dependent Claim 12 words
The transistor of claim 1, wherein the dielectric traverses a sloping sidewall.
Claim 4
Dependent Claim 13 words
The transistor of claim 2 wherein the gate electrode traverses the sloping sidewall.
Claim 5
Dependent Claim 15 words
The transistor of claim 3, further comprising a dielectric substrate, the substrate supporting the mesa.
Claim 6
Dependent Claim 26 words
The transistor of claim 4, wherein the surface is the principal surface of the mesa and wherein the sidewall is a sloping sidewall of the mesa.
Claim 7
Dependent Claim 20 words
The transistor of claim 5, wherein the mesa is comprised of silicon and wherein the substrate is comprised of sapphire.
Claim 8
Dependent Claim 13 words
The transistor of claim 6, wherein the dielectric is an oxide of silicon.
Claim 9
Dependent Claim 17 words
The transistor of claim 7, wherein the gate electrode is either aluminum or highly doped polycrystalline silicon.
Claim 10
Dependent Claim 18 words
The transistor of claim 8, further comprising a layer of an oxide of silicon completely covering the sidewall.
Claim 11
Dependent Claim 16 words
The transistor of claim 9, wherein the layer extends onto the principal surface from the sidewall.

References Cited (Backward Citations)

US3840888A Cited
US3898684A Cited
US3890632A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-03-28 1980-09-27 1981-03-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-03-28 1984-09-27 1985-03-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-03-28 1988-09-27 1989-03-29 $7700.00 Window Closed / Lapsed

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