Patent US4012764A successfully refreshed from Google Patents.
US4012764A
Expired / Lapsed
US
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Semiconductor integrated circuit device
Assignee: Hitachi Ltd
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Filing: 1975-12-04
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Granted: 1977-03-15
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Expires: 1995-12-04
Abstract
Abstract A semiconductor integrated circuit device comprises at least a transistor comprising a semiconductor substrate including at least a single collector region of a first conductivity type, a plurality of base regions of a second conductivity type formed in the collector region, and emitter regions of the first conductivity type respectively formed in the base regions of the second conductivity type. The second conductivity type base regions are electrically connected in common with one another and the first conductivity type emitter regions are electrically connected in common with one another. A multilayer interconnection structure is employed so that the density of integration of the semiconductor integrated circuit device is high.
Inventors
- 👤 Koichiro Satonaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:38
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/40; H10D10/421; H10D64/00; H10D64/20; H10D64/23; H10D64/231
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
386 words
In a semiconductor integrated circuit device which comprises at least a transistor comprising a semiconductor substrate including at least a single collector region of a first conductivity type, a plurality of base regions of a second conductivity type formed in said collector region, and emitter regions of the first conductivity type respectively formed in the base regions of the second conductivity type, the plurality of second conductivity type base regions being electrically commonly connected with one another, the plurality of first conductivity type emitter regions being electrically commonly connected with one another, a semiconductor integrated circuit device which comprises a first layer of insulating film formed on one principal surface of said semiconductor substrate, the first-layer insulating film being formed with a plurality of emitter first-layer window opening portions for exposing the greater parts of surface portions of said plurality of emitter regions on said one principal surface of said semiconductor substrate, with a plurality of base first-layer window opening portions for exposing the greater parts of surface portions of said plurality of base regions, and with a plurality of collector first-layer window opening portions for exposing the plurality of places of a surface portion of said single collector region; a first electrode interconnection layer, said interconnection layer forming a plurality of emitter first electrode layers or a single such layer respectively or commonly held in ohmic contact with said plurality of emitter regions through said plurality of emitter first-layer window opening portions, a single base first electrode interconnection layer commonly held in ohmic contact with said plurality of base regions through said plurality of base first-layer window opening portions, and a plurality of collector first electrode layers respectively held in ohmic contact with said collector region in said plurality of collector first-layer window opening portions; a second layer of insulating film formed on said first-layer insulating film and said first electrode interconnection layer, the second-layer insulating film being formed at least with a plurality of collector second-layer window opening portions for exposing at least parts of surface portions of said plurality of collector first electrode layers; and a second electrode interconnection layer, said interconnection layer forming at least a single collector second electrode interconnection layer electrically commonly connected with said plurality of collector first electrode layers through said plurality of collector second-layer window opening portions.
Claim 2
Dependent Claim
386 words
In a semiconductor integrated circuit device which comprises at least a transistor comprising a semiconductor substrate including at least a single collector region of a first conductivity type, a plurality of base regions of a second conductivity type formed in said collector region, and emitter regions of the first conductivity type respectively formed in the base regions of the second conductivity type, the plurality of second conductivity type base regions being electrically commonly connected with one another, the plurality of first conductivity type emitter regions being electrically commonly connected with one another, a semiconductor integrated circuit device which comprises a first layer of insulating film formed on one principal surface of said semiconductor substrate, the first-layer insulating film being formed with a plurality of emitter first-layer window opening portions for exposing the greater parts of surface portions of said plurality of emitter regions on said one principal surface of said semiconductor substrate, with a plurality of base first-layer window opening portions for exposing the greater parts of surface portions of said plurality of base regions, and with a plurality of collector first-layer window opening portions for exposing the plurality of places of a surface portion of said single collector region; a first electrode interconnection layer, said interconnection layer forming a plurality of emitter first electrode layers or a single such layer respectively or commonly held in ohmic contact with said plurality of emitter regions through said plurality of emitter first-layer window opening portions, a single base first electrode interconnection layer commonly held in ohmic contact with said plurality of base regions through said plurality of base first-layer window opening portions, and a plurality of collector first electrode layers respectively held in ohmic contact with said collector region in said plurality of collector first-layer window opening portions; a second layer of insulating film formed on said first-layer insulating film and said first electrode interconnection layer, the second-layer insulating film being formed at least with a plurality of collector second-layer window opening portions for exposing at least parts of surface portions of said plurality of collector first electrode layers; and a second electrode interconnection layer, said interconnection layer forming at least a single collector second electrode interconnection layer electrically commonly connected with said plurality of collector first electrode layers through said plurality of collector second-layer window opening portions.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-03-14 | 1980-09-13 | 1981-03-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-03-14 | 1984-09-13 | 1985-03-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-03-14 | 1988-09-13 | 1989-03-15 | $7700.00 | Window Closed / Lapsed |