Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
238 words
In a communications multiplexer module for transferring data between a host computer and a plurality of line adapters, the combination comprising: an addressable memory for storing a plurality of control words, there being one control word associated with each of said line adapters and addressable therewith, each said control word including control character table selection bits, control interpretation table selection bits, and an area for temporarily storing a character being transferred between said host computer and the associated line adapter; data transfer means connecting said addressable memory to said line adapters and said host computer for the transfer of data between the temporary storage area of an addressed control word and its associated line adapter or said host computer; a first memory comprising a plurality of addressable control character tables, a second memory comprising a plurality of addressable control interpretation tables; means for applying said control character table selection bits to said first memory to select one of said control character tables; means for applying each character temporarily stored in a control word to said first memory as an address; means for applying said control interpretation table selection bits to said second memory to select one of said control interpretation tables; means for applying the output from said first memory to said second memory as an address; and means connected to said addressable memory for addressing said control words and their associated line adapters in a predetermined sequence.
Claim 2
Dependent Claim
238 words
In a communications multiplexer module for transferring data between a host computer and a plurality of line adapters, the combination comprising: an addressable memory for storing a plurality of control words, there being one control word associated with each of said line adapters and addressable therewith, each said control word including control character table selection bits, control interpretation table selection bits, and an area for temporarily storing a character being transferred between said host computer and the associated line adapter; data transfer means connecting said addressable memory to said line adapters and said host computer for the transfer of data between the temporary storage area of an addressed control word and its associated line adapter or said host computer; a first memory comprising a plurality of addressable control character tables, a second memory comprising a plurality of addressable control interpretation tables; means for applying said control character table selection bits to said first memory to select one of said control character tables; means for applying each character temporarily stored in a control word to said first memory as an address; means for applying said control interpretation table selection bits to said second memory to select one of said control interpretation tables; means for applying the output from said first memory to said second memory as an address; and means connected to said addressable memory for addressing said control words and their associated line adapters in a predetermined sequence.
Claim 3
Dependent Claim
43 words
The combination as claimed in claim 1 wherein said temporarily stored characters may be in different codes, and wherein said first memory is loaded at each location with a translation of certain addressing characters into a code recognizable in the communications multiplexer module.
Claim 4
Dependent Claim
23 words
The combination as claimed in claim 2 wherein said first memory is loaded at each location with a translation of control characters only.
Claim 5
Dependent Claim
47 words
The combination as claimed in claim 3 wherein certain of said translated control characters are applied as an address to said second memory; and wherein said second memory is loaded at each address with one or more bits each defining a different control function to be performed.
Claim 6
Dependent Claim
94 words
The combination as claimed in claim 4 wherein each said area for temporarily storing a character includes an assembly/disassembly area, and wherein an addressed line adapter applies input data over said data transfer means to its associated assembly/disassembly area a bit at a time said data bits being temporarily stored in the assembly/disassembly area until a complete character is assembled, said means for applying each temporarily stored character to said first memory including means responsive to the contents of said assembly/disassembly area for applying each input character to said first memory as an address.
Claim 7
Dependent Claim
77 words
The combination as claimed in claim 5 wherein each said area for temporarily storing a character includes a first storage area for receiving output data a character at a time from said host computer through said data transfer means for temporary storage, said means for applying each temporarily stored character to said first memory includes means responsive to the contents of said first storage area for applying each output character to said first memory as an address.
Claim 8
Dependent Claim
62 words
The combination as claimed in claim 5 wherein each control word includes mode bits defining whether data is outputted to the associated line adapter or data is inputted from the line adapter, and means responsive to said mode bits for selecting the contents of said first storage area or the contents of said assembly/disassembly area as the address for said first memory.
Claim 9
Dependent Claim
51 words
The combination as claimed in claim 7 wherein the characters in one of said areas may have a parity bit associated therewith, whereby a control character may address either of two addresses, depending upon whether it is an input character or an output character, it its parity bit is a one.
Claim 10
Dependent Claim
67 words
The combination as claimed in claim 7 and further comprising: end of character means for producing an end of character signal each time a complete character has been transferred between a control word and its associated line adapter; and, gating means responsive to said end of character signal for inhibiting the output signals from said first and second memories except when said end of character signal occurs.
Claim 11
Dependent Claim
35 words
The combination as claimed in claim 9 wherein the output signals from said memories set flag bits in the control word which addressed the first memory to thereby control messages of one of more characters.
Claim 12
Dependent Claim
54 words
The combination as claimed in claim 10 wherein said first memory stores a code representing a DLE character, each said control word having one bit position for storing a DLE flag, and means responsive to said DLE character for setting said DLE flag when said first memory location storing said DLE character is addressed.
Claim 13
Dependent Claim
31 words
The combination as claimed in claim 11 wherein said first memory stores control characters for controlling certain functions, and means for inhibiting said functions if said DLE flag is not set.
Claim 14
Dependent Claim
30 words
The combination as claimed in claim 11 wherein said second memory contains bits for controlling certain functions, and means for inhibiting said functions if said DLE flag is not set.