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US4006470A
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Read-only memory
Assignee: Canon Inc
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Filing: 1975-06-30
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Granted: 1977-02-01
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Expires: 1995-06-30
Abstract
Abstract A read-only memory is provided with a multiplexer unit having at least one merged column. Thus, the read-only memory occupies a greatly reduced space.
Inventors
- 👤 Hajime Mitarai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:24
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17748; H03K19/1776; A; A63; A63F; A63F9/00; A63F9/14; G; G11; G11C; G11C17/00; G11C17/08
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
136 words
A read-only memory comprising: a set of memory cells defining a matrix and having pluralities of row and column conductors; multiplexer means including at least one merged column and having a plurality of outputs and first and second pluralities of inputs, said first inputs being coupled respectively to said column conductors of said set of memory cells; and row selector means having first and second groups of outputs for providing selection signals to select desired locations of said memory matrix, said first group of outputs being coupled respectively to said row conductors of said set of memory cells, and said second group of outputs being coupled respectively to said second plurality of inputs of said multiplexer means, wherein a row selection of said memory matrix is provided at said plurality of outputs of said multiplexer means.
Claim 2
Dependent Claim
136 words
A read-only memory comprising: a set of memory cells defining a matrix and having pluralities of row and column conductors; multiplexer means including at least one merged column and having a plurality of outputs and first and second pluralities of inputs, said first inputs being coupled respectively to said column conductors of said set of memory cells; and row selector means having first and second groups of outputs for providing selection signals to select desired locations of said memory matrix, said first group of outputs being coupled respectively to said row conductors of said set of memory cells, and said second group of outputs being coupled respectively to said second plurality of inputs of said multiplexer means, wherein a row selection of said memory matrix is provided at said plurality of outputs of said multiplexer means.
Claim 3
Dependent Claim
25 words
A read-only memory as set forth in claim 1, wherein said multiplexer means and said memory cells comprise an integrated circuit having transistors formed therein.
Claim 4
Dependent Claim
33 words
A read-only memory as set forth in claim 1, comprising a plurality of sets of said memory cells, wherein at least one of said memory cell sets includes at least one merged column.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-02-01 | 1980-08-02 | 1981-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-02-01 | 1984-08-02 | 1985-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-02-01 | 1988-08-02 | 1989-02-01 | $7700.00 | Window Closed / Lapsed |