Method of manufacturing an insulated gate field effect transistor

Claim 2

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; first, second and third regions of a second conductivity type, opposite to said first conductivity type, within said semiconductor substrate adjacent said main surface thereof and disposed with respect to each other to form a first channel within said semiconductor substrate between said first and second regions and a second channel within said semiconductor substrate between said second and third regions; first and second insulating films of SiO 2 disposed upon said main surface of said semiconductor substrate overlying said first and second channels thereof, respectively, wherein said first and second insulating films each have a thickness of approximately 1500A and 1000 to 1200A, respectively; a conductivity modifying impurity of said second conductivity type diffused into each of said first and second insulating films; and said first insulating film being of a sufficiently large thickness such that said impurity of said second conductivity type diffused therein produces a field of a strength insufficient to change the conductivity type of said first channel whereby said first channel and said first and second regions form an enhancement mode transistor, and said second film being of a lesser thickness than said first film such that such impurity of said second conductivity type diffused therein produces a field of a sufficient intensity to alter the conductivity type of said second channel whereby said second channel and said second and third regions form a depletion mode transistor.

Claim 3

A semiconductor device as recited in claim 1, wherein said semiconductor substrate is n-type and each of said first, second and third regions and said conductivity modifying impurity is p-type.

Claim 4

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a first main surface; first, second and third regions of a second conductivity type opposite to said first conductivity type formed within said semiconductor substrate adjacent to said main surface thereof, said first, second and third regions being arranged with respect to each other to form a first channel in said semiconductor substrate between said first and second regions and a second channel in said semiconductor substrate between said second and third regions thereof; an impurity of a second conductivity type opposite to said first conductivity type; first and second insulating films of SiO 2 formed on said main surface of said semiconductor substrate having thickness in the range of approximately 1000A to 1100A and respectively covering said first and second channels therein; a third film of Si 3 N 4 having a thickness of approximately 100A formed on said first insulating film, said third film has a diffusion coefficient with respect to said impurity of said second conductivity type which is lower than the diffusion coefficient with respect to said impurity of said second conductivity type of said first and second insulating films, said impurity of said second conductivity type being formed in said second channel by diffusion through said second insulating layer and said second and third regions forming a depletion mode transistor, and wherein said impurity being absent from said first channel by said third layer inhibiting diffusion thereof said first and second regions forming an enhancement mode transistor.

Claim 5

A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a first main surface; first, second and third regions of a second conductivity type opposite to said first conductivity type formed within said semiconductor substrate adjacent to said main surface thereof, said first, second and third regions being arranged with respect to each other to form a first channel in said semiconductor substrate between said first and second regions and a second channel in said semiconductor substrate between said second and third regions thereof; an impurity of a second conductivity type opposite to said first conductivity type; first and second insulating films of SiO 2 formed on said main surface of said semiconductor substrate having thickness in the range of approximately 1000A to 1100A and respectively covering said first and second channels therein; a third film of Si 3 N 4 having a thickness of approximately 100A formed on said first insulating film, said third film has a diffusion coefficient with respect to said impurity of said second conductivity type which is lower than the diffusion coefficient with respect to said impurity of said second conductivity type of said first and second insulating films, said impurity of said second conductivity type being formed in said second channel by diffusion through said second insulating layer and said second and third regions forming a depletion mode transistor, and wherein said impurity being absent from said first channel by said third layer inhibiting diffusion thereof said first and second regions forming an enhancement mode transistor.