Patent US3986192A successfully refreshed from Google Patents.
US3986192A
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High efficiency gallium arsenide impatt diodes
Assignee: AT&T Inc
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Filing: 1975-01-02
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Granted: 1976-10-12
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Expires: 1995-01-02
Abstract
Abstract The operating frequency of an IMPATT diode depends on the width of the depletion region formed during operation. The frequency of high efficiency GaAs IMPATT diodes comprising a non-uniformly doped depletion region contacted by a rectifying barrier can be more precisely fixed by forming a "clump" of charge at exactly the depth below the surface contacted by the rectifying barrier corresponding to the desired depletion region.
Inventors
- 👤 James Vincent DiLorenzo
- 👤 William Charles Niehaus
- 👤 Lawrence John Varnerin, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:27
CPC Classifications
H; H10; H10D; H10D8/00; H10D8/40; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/2913; H10P14/2916; H10P14/2917; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3221; H10P14/3242; H10P14/3244; H10P14/3248; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; Y; Y10; Y10S; Y10S148/00; Y10S148/007; Y10S148/017; Y10S148/056; Y10S148/057; Y10S148/065; Y10S148/079; Y10S148/129; Y10S148/139; Y10S438/00; Y10S438/936
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
114 words
A high efficiency gallium arsenide Schottky barrier diode comprising: a. a gallium arsenide substrate having two major opposed surfaces; b. an electrical contact covering at least a portion of a first major surface of the substrate; c. at least one epitaxially deposited gallium arsenide layer covering at least a portion of a second major surface of the substrate and including a first region of relatively higher concentration of impurity as compared with the deposited layer; and d. a rectifying barrier contact contacting the epitaxially deposited layer, characterized in that the epitaxially deposited gallium arsenide layer further includes a second region of relatively higher concentration of impurity, located between the first region and the substrate.
Claim 2
Dependent Claim
114 words
A high efficiency gallium arsenide Schottky barrier diode comprising: a. a gallium arsenide substrate having two major opposed surfaces; b. an electrical contact covering at least a portion of a first major surface of the substrate; c. at least one epitaxially deposited gallium arsenide layer covering at least a portion of a second major surface of the substrate and including a first region of relatively higher concentration of impurity as compared with the deposited layer; and d. a rectifying barrier contact contacting the epitaxially deposited layer, characterized in that the epitaxially deposited gallium arsenide layer further includes a second region of relatively higher concentration of impurity, located between the first region and the substrate.
Claim 3
Dependent Claim
220 words
The diode of claim 1 in which: b. an electrical ohmic contact covers at least a portion of a first major surface of the substrate; c. a first epitaxially deposited gallium arsenide layer covers at least a portion of a second major surface of the substrate, and has a carrier concentration of about 1 × 10 17 cm - 3 to 1 × 10 18 cm - 3 and a thickness of about 2 μm to 6 μm; d. a second epitaxially deposited gallium arsenide layer covers the first gallium arsenide layer, and has a carrier concentration of about 1 × 10 15 cm - 3 to 1 × 10 16 cm - 3 , a thickness ranging from 4 μm to 8 μm and includes two regions of relatively higher carrier concentration; 1. a first region having an amount of charge ranging from about 2 × 10 12 cm - 2 to 3.5 × 10 12 cm - 2 located near the exposed surface of the second layer, and 2. a second region having an amount of change ranging from about 1 × 10 12 cm - 2 to 3.5 × 10 12 cm - 2 located between the first region and the first layer; and e. a Schottky barrier contact contacting the exposed surface of the second layer.
Claim 4
Dependent Claim
21 words
The device of claim 2 in which the both regions have a width ranging from about 0.01 μm to 0.5 μm.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-10-12 | 1980-04-12 | 1980-10-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-10-12 | 1984-04-12 | 1984-10-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-10-12 | 1988-04-12 | 1988-10-12 | $7700.00 | Window Closed / Lapsed |