Magnetic tape phase encoded data read circuit

Claim 2

A digital circuit for reading phase encoded data from a magnetic tape comprising: a read head for reading data bits and phasing bits which comprise phase encoded data from said magnetic tape, a phase lock loop circuit for generating from said data bits and electronic window defining that portion of each data bit cycle during which a data will be read by said read head, said phase lock loop circuit comprising: a. digital counter means for receiving said data bits and for counting a number of time intervals between said data bits, and b. decoder means for receiving said digital counter means output and producing an electronic window therefrom, and logic means for producing as an output each bit received by said logic means from said read head during the time defined by said window, and for inhibiting the output of each bit received during the time interval between windows.

Claim 3

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track for reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating from said data bits an electronic window defining that portion of each data bit cycle during which a data bit will be read by the associated read head, said phase lock loop circuit comprising: a. digital counter means for receiving said data bits and for counting a number of time intervals between said data bits, and b. decoder means for receiving said digital counter means output and producing an electronic window therefrom, and a logic circuit per track for producing as an output each bit received by said logic circuit from its associated read head during the time defined by said window, and for inhibiting the output of each bit received during the time interval between windows.

Claim 4

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track for reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating from said data bits an electronic window defining that portion of each data bit cycle during which a data bit will be read by the associated read head, said phase lock loop circuit comprising: a. digital counter means for receiving said data bits and for counting a number of time intervals between said data bits, and b. decoder means for receiving said digital counter means output and producing an electronic window therefrom, and a logic circuit per track for producing as an output each bit received by said logic circuit from its associated read head during the time defined by said window, and for inhibiting the output of each bit received during the time interval between windows.

Claim 5

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track for reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating from said data bits an electronic window defining that portion of each data bit cycle during which a data bit will be read by the associated read head, and a logic circuit per track for producing as an output each bit received by said logic circuit from its associated read head during the time defined by said window, and for inhibiting the output of each bit received during the time interval between windows, a temporary storage means per track for receving output data bits from said associated logic means, and for storing each data bit for a time equal to a fixed number of data bit cycles, and a control circuit for sequentially reading complete bytes from said temporary storage means wherein each of said complete bytes comprises one bit from each temporary storage means, said reading being performed immediately upon the reception of all bits of each byte by said temporary storage means.

Claim 6

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track for reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating from said data bits an electronic window defining that portion of each data bit cycle during which a data bit will be read by the associated read head, and a logic circuit per track for producing as an output each bit received by said logic circuit from its associated read head during the time defined by said window, and for inhibiting the output of each bit received during the time interval between windows, a temporary storage means per track for receving output data bits from said associated logic means, and for storing each data bit for a time equal to a fixed number of data bit cycles, and a control circuit for sequentially reading complete bytes from said temporary storage means wherein each of said complete bytes comprises one bit from each temporary storage means, said reading being performed immediately upon the reception of all bits of each byte by said temporary storage means.

Claim 7

The apparatus of claim 3 wherein each data bit received, through said logic means from said read head is coupled to said associated phase lock loop means, and wherein each electronic window generated by each of said phase lock loop circuits is generated so that it is centered about a point in time exactly one data bit cycle period after the point in time when said data bit was received.

Claim 8

The apparatus of claim 4 further comprising: counting means coupled to one of said plurality of phase lock loop circuits for counting down one bit for each time time the data bit received by said phase lock loop circuit is received during the first half of said electronic window, for counting up one bit for each time the data bit is received during the second half of said electronic window, for overflowing when the absolute value of said counting means contents exceeds a predetermined number, and for decreasing or increasing by a predetermined amount the time between electronic windows for each of said overflows.

Claim 9

The apparatus of claim 5 further comprising: means for varying the preselected number of counts required for a counting means overflow so that a smaller count will be required during a preselected period of time at the beginning of a series of data bit receptions and a larger count will be required thereafter.

Claim 10

The apparatus of claim 6 further comprising: clock means for generating a continuous series of clock pulses, the frequency of said clock pulses being a prdetermined multiple of the data bit frequency, and wherein said phase lock loop circuit comprises, a. a register implemented from a plurality of flip-flops, the clock input of said register coupled to the clock output of said clock means, and b. a programmable read-only memory (PROM), the outputs of said PROM coupled to the inputs of said register, the outputs of said register and the data bit coupled from said read head through said logic means to the address inputs of said PROM, said PROM programmed such that said register and PROM constitute a counter circuit for generating a complete window cycle and said data bit constitutes a resetting signal to center the next window generated on a point in time one data bit cycle period after said data bit.

Claim 11

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track fro reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating an electronic window for each data bit, each of said windows being centered about a point in time occurring one data bit cycle period after each of said data bits are received, a logic circuit per track for receiving said electronic windows from said phase lock loop circuit, for receiving said data bits and said phasing bits from said read head, for inhibiting the output of bits received outside said window and for enabling the output to said phase lock loop circuit of bits received within said windows, whereby said data bits will be enabled and said phasing bits will be inhibited, a temporary storage circuit per track for storing every data bit output of said logic circuit for a time equal to a predetermined fixed number of data bit cycle periods, and a control circuit for accessing from said temporary storage circuits each byte as soon as it is completely loaded into said temporary storage circuits, wherein said byte consists of a set of associated data bits intended to be recorded on and read from said magnetic tape in parallel.

Claim 12

A digital circuit for reading phase encoded data from a magnetic tape having a plurality of tracks comprising: a read head per track fro reading data bits and phasing bits from said magnetic tape, a phase lock loop circuit per track for generating an electronic window for each data bit, each of said windows being centered about a point in time occurring one data bit cycle period after each of said data bits are received, a logic circuit per track for receiving said electronic windows from said phase lock loop circuit, for receiving said data bits and said phasing bits from said read head, for inhibiting the output of bits received outside said window and for enabling the output to said phase lock loop circuit of bits received within said windows, whereby said data bits will be enabled and said phasing bits will be inhibited, a temporary storage circuit per track for storing every data bit output of said logic circuit for a time equal to a predetermined fixed number of data bit cycle periods, and a control circuit for accessing from said temporary storage circuits each byte as soon as it is completely loaded into said temporary storage circuits, wherein said byte consists of a set of associated data bits intended to be recorded on and read from said magnetic tape in parallel.