US3976867A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Calculator timer with simple base-6 correction
Assignee: RCA Corp
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Filing: 1975-12-10
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Granted: 1976-08-24
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Expires: 1995-12-10
Abstract
Abstract Timer circuit using commercially available fourfunction calculator circuit uses a fast clock to count values from 60 to 100. This transforms the tens of seconds digit to base six.
Inventors
- 👤 Alleyne Resue Campbell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:51
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/02; G06F15/025; G04; G04F; G04F10/00; G04F10/04; G04G; G04G3/00; G04G3/02; G04G3/022
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
187 words
In a timing system comprising a calculator circuit means having an accumulated results output digit means with at least a tens of seconds digit means, display means responsive to the accumulated result output digit means for providing an indication of accumulated results, timer clock means for producing periodically spaced pulses having a period equal to a desired timing period, switching means responsive to clock means for incrementing the accumulated result, the improvement comprising: fast clock means for producing pulses at a substantially greater rate than said timer clock means; first recognition means responsive to said accumulated results output means for producing an output signal when said tens of seconds digit means has a value of six; second recognition means responsive to said accumulated results output means for producing an output signal when said tens of seconds digit means has a value of zero; and clock selection means responsive to the output signal from said first recognition means for coupling said fast clock means to said switching means and to the output signal from said second recognition means for coupling said timer clock means to said switching means.
Claim 2
Dependent Claim
187 words
In a timing system comprising a calculator circuit means having an accumulated results output digit means with at least a tens of seconds digit means, display means responsive to the accumulated result output digit means for providing an indication of accumulated results, timer clock means for producing periodically spaced pulses having a period equal to a desired timing period, switching means responsive to clock means for incrementing the accumulated result, the improvement comprising: fast clock means for producing pulses at a substantially greater rate than said timer clock means; first recognition means responsive to said accumulated results output means for producing an output signal when said tens of seconds digit means has a value of six; second recognition means responsive to said accumulated results output means for producing an output signal when said tens of seconds digit means has a value of zero; and clock selection means responsive to the output signal from said first recognition means for coupling said fast clock means to said switching means and to the output signal from said second recognition means for coupling said timer clock means to said switching means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-08-24 | 1980-02-23 | 1980-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-08-24 | 1984-02-23 | 1984-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-08-24 | 1988-02-23 | 1988-08-24 | $7700.00 | Window Closed / Lapsed |