Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
150 words
Apparatus for processing an analog speech signal comprising: signal generator means for generating a squelch signal; summing circuit means for generating a summed signal representative of the sum of said speech signal and said squelch signal; circuit means receiving said summed signal for quantizing the same in amplitude and in time; detector circuit means for detecting the presence of said squelch signal in said summed signal; and tri-level signal generator receiving said quantized, summed signal and responsive to said detector circuit means for generating an output signal of a first level when said quantized signal is a speech signal of one level, and for generating an output signal of a second level when said quantized signal is a speech signal of a second level, and for generating an output signal of a third level when said detector circuit means detects the presence of a squelch signal in said summed signal.
Claim 2
Dependent Claim
150 words
Apparatus for processing an analog speech signal comprising: signal generator means for generating a squelch signal; summing circuit means for generating a summed signal representative of the sum of said speech signal and said squelch signal; circuit means receiving said summed signal for quantizing the same in amplitude and in time; detector circuit means for detecting the presence of said squelch signal in said summed signal; and tri-level signal generator receiving said quantized, summed signal and responsive to said detector circuit means for generating an output signal of a first level when said quantized signal is a speech signal of one level, and for generating an output signal of a second level when said quantized signal is a speech signal of a second level, and for generating an output signal of a third level when said detector circuit means detects the presence of a squelch signal in said summed signal.
Claim 3
Dependent Claim
38 words
The apparatus of claim 1 wherein said third level of said output signal is zero volts, and wherein said first and second levels thereof are of opposite polarity but equal in magnitude relative to said zero volt level.
Claim 4
Dependent Claim
57 words
The apparatus of claim 1 further comprising a clock pulse generator, said squelch signal generator receiving the output signal of said clock pulse generator and dividing the same by two to generate said squelch signal; and wherein said quantizing circuit means quantizes said summed signal in timed relation to the output signal of said clock pulse generator.
Claim 5
Dependent Claim
131 words
In apparatus for processing an analog speech signal to which a squelch signal is added and the summed signal is quantized in amplitude and time, the improvement comprising: squelch signal detector means responsive to said summed signal quantized in amplitude for detecting the presence of a squelch signal; and tri-level signal generator means receiving said quantized signal and responsive to the output signal of said squelch signal detector means for generating a tri-level signal, said tri-level signal being of a first level when said speech signal is greater than said squelch signal, said tri-level signal being a second level when said speech signal is less than the LOW level of said squelch signal, said tri-level signal being a level intermediate said first and second levels when said squelch signal is present.
Claim 6
Dependent Claim
131 words
In apparatus for processing an analog speech signal to which a squelch signal is added and the summed signal is quantized in amplitude and time, the improvement comprising: squelch signal detector means responsive to said summed signal quantized in amplitude for detecting the presence of a squelch signal; and tri-level signal generator means receiving said quantized signal and responsive to the output signal of said squelch signal detector means for generating a tri-level signal, said tri-level signal being of a first level when said speech signal is greater than said squelch signal, said tri-level signal being a second level when said speech signal is less than the LOW level of said squelch signal, said tri-level signal being a level intermediate said first and second levels when said squelch signal is present.
Claim 7
Independent Claim
100 words
A method of processing a speech signal comprising: adding a binary squelch signal to said speech signal to generate a summed signal, amplifying and clipping the peaks of said summed signal; quantizing said summed signal in timed relation to a clock pulse, said clock pulse bearing a known timed relation with said squelch signal, detecting the presence of a squelch signal in said summed signal; and generating an output tri-level signal having a HIGH value when said speech signal is high, a low level when said speech signal is low, and an intermediate level when said squelch signal is present.
Claim 8
Independent Claim
100 words
A method of processing a speech signal comprising: adding a binary squelch signal to said speech signal to generate a summed signal, amplifying and clipping the peaks of said summed signal; quantizing said summed signal in timed relation to a clock pulse, said clock pulse bearing a known timed relation with said squelch signal, detecting the presence of a squelch signal in said summed signal; and generating an output tri-level signal having a HIGH value when said speech signal is high, a low level when said speech signal is low, and an intermediate level when said squelch signal is present.