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US3970866A Expired / Lapsed US ⏱️ 0.0 years remaining

Logic gate circuits

Assignee: Atmel Corp
•
Filing: 1974-08-13
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Granted: 1976-07-20
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Expires: 1994-08-13
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Abstract

Abstract A logic family is provided capable of accomplishing a logic function for each transistor used, i.e. one transistor per logic gate. A plurality of logic gate types are shown, each capable of a different logic function.

Inventors

  • 👤 David E. Fulkerson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 09:50
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/02; H03K19/08; H03K19/082

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 113 words
A circuit for performing logical functions including an AND function, said circuit comprising: a first gate circuit comprising: a bipolar transistor having a first gate base, a first gate collector and a plurality of emitters therein, said emitters, including a first emitter, being inputs to receive signals from sources of signals excepting those said emitters which are directly connected to said first gate base including a second emitter so connected; and a first resistor connected between said first gate base and a first terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said AND function is provided including said bipolar transistor as a non-inverting transistor.
Claim 2
Dependent Claim 113 words
A circuit for performing logical functions including an AND function, said circuit comprising: a first gate circuit comprising: a bipolar transistor having a first gate base, a first gate collector and a plurality of emitters therein, said emitters, including a first emitter, being inputs to receive signals from sources of signals excepting those said emitters which are directly connected to said first gate base including a second emitter so connected; and a first resistor connected between said first gate base and a first terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said AND function is provided including said bipolar transistor as a non-inverting transistor.
Claim 3
Dependent Claim 28 words
The circuit of claim 1 wherein a second resistor is connected between said first gate collector and a second terminal means adapted for connection to a voltage source.
Claim 4
Dependent Claim 16 words
The circuit of claim 2 wherein said second terminal means is also said first terminal means.
Claim 5
Dependent Claim 33 words
The circuit of claim 1 wherein said first gate collector is directly connected to an input of a second gate circuit, said second gate circuit being capable of performing a NOR logical function.
Claim 6
Dependent Claim 32 words
The circuit of claim 1 wherein said first emitter directly is connected to an output of a second gate circuit, said second gate circuit being capable of performing a NOR logical function.
Claim 7
Dependent Claim 99 words
The circuit of claim 4 wherein said second gate circuit comprises: a bipolar transistor having a second gate collector, a second gate emitter and effectively a plurality of bases therein, said bases, including a first base, being inputs to receive signals from sources of signals, said first base connected as aforesaid to said first gate collector; a second resistor connected between said second gate emitter and a second terminal means adapted for connection to a voltage source; and a third resistor connected between said second gate collector and a third terminal means adapted for connection to a voltage source.
Claim 8
Dependent Claim 99 words
The circuit of claim 4 wherein said second gate circuit comprises: a bipolar transistor having a second gate collector, a second gate emitter and effectively a plurality of bases therein, said bases, including a first base, being inputs to receive signals from sources of signals through a plurality of base resistors, each of said base resistors being in series with one of said bases, and said first base being connected a aforesaid to said first gate collector; and a second resistor connected between said second gate collector and a second terminal means adapted for connection to a voltage source
Claim 9
Dependent Claim 78 words
The circuit of claim 5 wherein said second gate circuit comprises: a bipolar transistor having a second gate collector, a second gate emitter and effectively a plurality of bases therein, said bases being inputs to receive signals from sources of signals and said second gate collector being an output connected as aforesaid to said first emitter; and a second resistor connected between said second gate emitter and a second terminal means adapted for connection to a voltage source.
Claim 10
Dependent Claim 97 words
The circuit of claim 5 wherein said second gate circuit comprises: a bipolar transistor having a second gate collector, a second gate emitter and effectively a plurality of bases therein, said basis being inputs to receive signals from sources of signals through a plurality of base resistors, each of said base resistors being in series with one of said bases, and said second gate collector being an output connected as aforesaid to said first emitter; and a second resistor connected between said second gate collector and a second terminal means adapted for connection to a voltage source.
Claim 11
Dependent Claim 21 words
The circuit of claim 6 wherein a fourth resistor is connected between said first gate collector and said first terminal means.
Claim 12
Dependent Claim 21 words
The circuit of claim 7 wherein a third resistor is connected between said first gate collector and said first terminal means.
Claim 13
Dependent Claim 21 words
The circuit of claim 8 wherein a third resistor is connected between said first gate collector and said first terminal means.
Claim 14
Dependent Claim 28 words
The circuit of claim 8 wherein a third resistor is connected between said second gate collector and a third terminal means adapted for connection to a voltage source.
Claim 15
Dependent Claim 21 words
The circuit of claim 9 wherein a third resistor is connected between said first gate collector and said first terminal means.
Claim 16
Dependent Claim 21 words
The circuit of claim 10 wherein a Schottky diode is connected from one of said bases to said second gate collector.
Claim 17
Dependent Claim 21 words
The circuit of claim 11 wherein a Schottky diode is connected from one of said bases to said second gate collector.
Claim 18
Dependent Claim 21 words
The circuit of claim 12 wherein a Schottky diode is connected from one of said bases to said second gate collector.
Claim 19
Dependent Claim 21 words
The circuit of claim 13 wherein a fourth resistor is connected between said first gate collector and said first terminal means.
Claim 20
Dependent Claim 21 words
The circuit of claim 14 wherein a Schottky diode is connected from one of said bases to said second gate collector.
Claim 21
Dependent Claim 21 words
The circuit of claim 18 wherein a Schottky diode is connected from one of said bases to said second gate collector.
Claim 22
Dependent Claim 107 words
A circuit for performing logical functions including a NOR function, said circuit comprising: a first gate circuit comprising: a bipolar transistor having a first gate collector, a first gate emitter and a plurality of first gate bases therein, said first gate bases being inputs to receive signals from sources of signals; a first resistor connected between said first gate emitter and a first terminal means adapted for connection to a voltage source; and a second resistor connected between said first gate collector and a second terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said NOR function is provided.
Claim 23
Dependent Claim 107 words
A circuit for performing logical functions including a NOR function, said circuit comprising: a first gate circuit comprising: a bipolar transistor having a first gate collector, a first gate emitter and a plurality of first gate bases therein, said first gate bases being inputs to receive signals from sources of signals; a first resistor connected between said first gate emitter and a first terminal means adapted for connection to a voltage source; and a second resistor connected between said first gate collector and a second terminal means adapted for connection to a voltage source, whereby a logic gate circuit capable of performing said NOR function is provided.
Claim 24
Dependent Claim 129 words
The circuit of claim 21 wherein an output of said first gate circuit is connected to an input of a second gate circuit capable of performing a NOR logical function, said second gate circuit comprising: a bipolar transistor having a second gate collector, a second gate emitter and a plurality of second gate bases therein, said second gate bases being inputs to receive signals from sources of signals through a plurality of base resistors, each of said base resistors being in series with one of said second gate bases, and said first gate collector being said output and connected as aforesaid to one of said base resistors; and a third resistor connected between said second gate collector and a third terminal means adapted for connection to a voltage source.
Claim 25
Dependent Claim 23 words
The circuit of claim 21 wherein a Schottky diode is connected from one of said first gate bases to said first gate collector.
Claim 26
Dependent Claim 43 words
The circuit of claim 22 wherein a first Schottky diode is connected from one of said first gate bases to said first gate collector and a second Schottky diode is connected from one of said second gate bases to said second gate collector.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-20 1980-01-19 1980-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-20 1984-01-19 1984-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-20 1988-01-19 1988-07-20 $7700.00 Window Closed / Lapsed

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