Normally off schottky barrier field effect transistor and method of fabrication

Claim 2

A normally off field effect transistor comprising: a substrate of a first conductivity type semiconductor material; a source and drain in said substrate of a conductivity type opposite said first conductivity type and separated by a channel region of said substrate; a first layer of substantially undoped semiconductor material of said first conductivity type contacting and covering a surface of said channel region; and a metal gate layer upon said first layer and forming a Schottky barrier with said first layer.

Claim 3

A field effect transistor as in claim 1 wherein said first layer is of the same semiconductor material as said substrate and of sufficient thickness to prevent said Schottky barrier formed by said first layer and said gate layer from including said channel in an unbiased state.

Claim 4

A field effect transistor as in claim 1 wherein said first layer also contacts a contiguous portion of a surface of said source and said drain.

Claim 5

A field effect transistor as in claim 1 wherein said substrate and said first layer are silicon, and said metal gate layer is aluminum.

Claim 6

A field effect transistor as in claim 4 wherein said first layer is selected from the group of polycrystalline silicon or amorphous silicon.

Claim 7

A field effect transistor as in claim 1 wherein said first layer has an impurity level below 10 16 carriers/cm 3 .

Claim 8

A Schottky barrier transistor comprising: a substrate of first conductivity type semiconductor material; a source and drain region of conductivity type opposite said first conductivity type spaced from each other in said substrate and electrically disconnected in an unbiased state; a first layer of substantially undoped semiconductor material of said first conductivity type contacting type contacting said source and drain regions and a surface of said substrate between said source and drain regions; and a layer of gate material substantially covering said layer of substantially undoped semiconductor material to form a Schottky barrier therewith.

Claim 9

A Schottky barrier transistor comprising: a substrate of first conductivity type semiconductor material; a source and drain region of conductivity type opposite said first conductivity type spaced from each other in said substrate and electrically disconnected in an unbiased state; a first layer of substantially undoped semiconductor material of said first conductivity type contacting type contacting said source and drain regions and a surface of said substrate between said source and drain regions; and a layer of gate material substantially covering said layer of substantially undoped semiconductor material to form a Schottky barrier therewith.

Claim 10

A Schottky barrier transistor as in claim 7, wherein said first layer is of the same semiconductor material as said substrate and of sufficient thickness to prevent said Schottky barrier from including said substrate in an unbiased state.

Claim 11

A Schottky barrier transistor as in claim 7 including: a layer of insulating material over said substrate; a second layer of substantially undoped semiconductor material over said layer of insulating material; said first layer of substantially undoped semiconductor material forms said connection to said source, said drain and said substrate through an aperture in said insulating layer.

Claim 12

A Schottkey barrier transistor as in claim 9 including electrodes connected to said source and drain regions through apertures in said second layer of substantially undoped semiconductor and said layer of insulation.