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US3939017A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for depositing the deposition agent on the surface of a number of semiconductor substrates

Assignee: Hitachi Ltd
•
Filing: 1974-03-29
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Granted: 1976-02-17
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Expires: 1994-03-29
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Abstract

Abstract A novel process for depositing and diffusing an impurity on and into the surface of a number of semiconductor wafers placed in parallel on a quartz boat. The impurity source is formed as a plurality of long and slender bars or a unitary tunnel-shaped element or a plurality of tunnel segments obtained by cutting the element apart. The impurity source as described above is mounted about the periphery of the semiconductor wafers arranged in a row on a quartz boat for reducing the consumption of the impurity source.

Inventors

  • 👤 Noboru Ryugo
  • 👤 Keizo Inaniwa
  • 👤 Akira Sugiyama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 23:05
CPC Classifications
C; C30; C30B; C30B31/00; C30B31/06; C30B31/16; C30B31/165; H; H10; H10P; H10P32/00; H10P32/10; H10P32/12; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S118/00; Y10S118/90

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 103 words
A process for diffusing an impurity into a semiconductor wafer comprising: placing a plurality of semiconductor wafers upright on a boat, placing a plurality of impurity sources so as to surround and be closely spaced from said wafers, placing said boat into one end of an elongated tube, discharging air within said tube from the other end of said tube to thereby establish a vacuum or reduced air atmosphere in said tube, and heating said semiconductor wafers and impurity sources in said tube to thereby produce a gaseous oxide from said impurity within said tube and diffuse said impurity into said semiconductor wafers.
Claim 2
Dependent Claim 103 words
A process for diffusing an impurity into a semiconductor wafer comprising: placing a plurality of semiconductor wafers upright on a boat, placing a plurality of impurity sources so as to surround and be closely spaced from said wafers, placing said boat into one end of an elongated tube, discharging air within said tube from the other end of said tube to thereby establish a vacuum or reduced air atmosphere in said tube, and heating said semiconductor wafers and impurity sources in said tube to thereby produce a gaseous oxide from said impurity within said tube and diffuse said impurity into said semiconductor wafers.
Claim 3
Dependent Claim 22 words
The process of claim 1, wherein said impurity sources are placed on said boat prior to placing said boat into said tube.
Claim 4
Dependent Claim 20 words
The process of claim 2, wherein said impurity sources are supported by and arranged longitudinally with respect to said boat.
Claim 5
Dependent Claim 24 words
The process of claim 3, wherein said impurity sources longitudinally extend past the plurality of semiconductor wafers arranged transversely with respect to said boat.
Claim 6
Dependent Claim 18 words
The process of claim 1, wherein said impurity sources are placed in said tube independently of said boat.
Claim 7
Dependent Claim 118 words
A process for diffusing an impurity into a semiconductor wafer comprising: placing a plurality of semiconductor wafers on a boat, said semiconductor wafers being arranged transversely with respect to the longitudinal direction of said boat, arranging a plurality of elongated impurity sources longitudinally with respect to said boat so that said impurity sources longitudinally extend past the outer peripheries of a plurality of semiconductor wafers, said impurity sources being closely spaced from the outer peripheries of said semiconductor wafers, said impurity sources being supported by said boat, placing said boat in an elongated tube, and heating said elongated tube to produce a gaseous oxide of said impurity within said tube and diffuse said impurity into said semiconductor wafers.
Claim 8
Dependent Claim 118 words
A process for diffusing an impurity into a semiconductor wafer comprising: placing a plurality of semiconductor wafers on a boat, said semiconductor wafers being arranged transversely with respect to the longitudinal direction of said boat, arranging a plurality of elongated impurity sources longitudinally with respect to said boat so that said impurity sources longitudinally extend past the outer peripheries of a plurality of semiconductor wafers, said impurity sources being closely spaced from the outer peripheries of said semiconductor wafers, said impurity sources being supported by said boat, placing said boat in an elongated tube, and heating said elongated tube to produce a gaseous oxide of said impurity within said tube and diffuse said impurity into said semiconductor wafers.
Claim 9
Dependent Claim 18 words
The process of claim 6 further comprising maintaining a reduced pressure or vacuum in said tube during heating.
Claim 10
Dependent Claim 13 words
The process of claim 7, wherein said tube is hermetically sealed during heating.
Claim 11
Dependent Claim 32 words
The process of claim 7, wherein said boat is placed into said elongated tube from one end thereof and further wherein air is withdrawn from said tube from the other end thereof.
Claim 12
Dependent Claim 18 words
The process of claim 7, wherein said boat includes support means for supporting said plurality of impurity sources.
Claim 13
Dependent Claim 30 words
The process of claim 10, wherein said impurity sources are in the form of spaced bars extending substantially parallel to each other and to the longitudinal axis of said tube.
Claim 14
Dependent Claim 22 words
The process of claim 10, wherein said plurality of impurity sources is composed of a tunnel-shaped element extending parallel to said tube.
Claim 15
Dependent Claim 30 words
The process of claim 6, wherein said impurity sources are in the form of spaced bars extending substantially parallel to each other and to the longitudinal axis of said tube.
Claim 16
Dependent Claim 22 words
The process of claim 6, wherein said plurality of impurity sources is composed of a tunnel-shaped element extending parallel to said tube.

References Cited (Backward Citations)

US2956913A Cited
US3362858A Cited
US3314833A Cited
US3374125A Cited
US3604694A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-02-16 1979-08-18 1980-02-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-02-16 1983-08-18 1984-02-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-02-16 1987-08-18 1988-02-17 $7700.00 Window Closed / Lapsed

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