Synchronizing signal regenerator

Claim 2

A synchronizing signal regenerator for regenerating a first synchronizing signal including a pulse series having a predetermined certain repetition frequency being intermittently transmitted at a predetermined period for a predetermined certain duration, and a second synchronizing signal synchronized with boundaries of the pulse series of the first synchronizing signal and inserted in a repetition period for a period equal to a width of the pulse series intermittently inserted, from a composite signal including said first and second synchronizing signals, the regenerator comprising: a means for detecting said second synchronizing signal and for regenerating said detected second synchronizing signal; a means for detecting and deriving the pulse series of said first synchronizing signal; a hold circuit for producing a wide width output pulse signal when a pulse of the detected pulse series is obtained at an interval less than a predetermined time interval; an integrator for integrating the output pulse signal of the hold circuit and providing an output signal; a means for producing a trigger pulse when an amplitude of the output signal of the integrator exceeds a certain determined level; and a means for generating a signal synchronized with said intermittently transmitted frequency of the pulse series of said first synchronizing signal, said generating means including a frequency dividing means for dividing the frequency of said regenerated second synchronizing signal obtained from the second synchronizing signal regenerating means, including means for using said regenerated second synchronizing signal as a clock pulse and means for using the trigger pulse obtained from said trigger pulse producing means as a clear pulse.

Claim 3

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detectinG and regenerating the first synchronizing signal synchronized with the boundaries of the information signals; n number of detecting means for detecting respective coded signals of the plurality of the second synchronizing signals, and for deriving signals for indicating transmission periods of said 1st to (n-2)th information signals, a signal for indicating the transmission period of a sum signal of the (n-1)th and nth information signals, and a signal for indicating the transmission period of the nth information signal; n number of hold circuits to which respective derived signals of said n detecting means are supplied, and for producing respective wide width output pulse signals when the derived signals of said n detecting means have an interval less than a predetermined time; n number of integrators for integrating respective output signals of said n hold circuits and providing output signals; n trigger pulse generators for producing respective trigger pulses when the amplitude of the output signals of the n integrators exceeds respective predetermined values; (n-1) step down circuits for frequency dividing the frequency of said regenerated first synchronizing signal into a 1/(n-1) frequency, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerating means as a clock pulse, and means for using trigger pulses produced by the trigger pulse generators as clear pulses, said trigger pulses being produced from the trigger pulse generators and which are synchronized with signals detected by the detecting means for deriving the signals for indicating the transmission period of the 1st to (n-2)th information signals, and for indicating the transmission period of the information signal which is a sum of the (n-1)th and nth information signals, respectively; a step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1), including means for using the regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse generated by the trigger pulse generator and which is synchronized with the signal detected by the detecting means for deriving a signal for indicating the transmission period of the nth information signal as a clear pulse; and a means for obtaining a logic product of the output signal of the step down circuit which uses the trigger pulse synchronized with the signals for indicating the transmission period of the sum of the (n-1) and nth information signals among the step down circuits for frequency dividing the frequency of the regenerated first synchronizing signal into 1/(n-1), and an inverted signal of the output signal of said step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1).

Claim 4

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detectinG and regenerating the first synchronizing signal synchronized with the boundaries of the information signals; n number of detecting means for detecting respective coded signals of the plurality of the second synchronizing signals, and for deriving signals for indicating transmission periods of said 1st to (n-2)th information signals, a signal for indicating the transmission period of a sum signal of the (n-1)th and nth information signals, and a signal for indicating the transmission period of the nth information signal; n number of hold circuits to which respective derived signals of said n detecting means are supplied, and for producing respective wide width output pulse signals when the derived signals of said n detecting means have an interval less than a predetermined time; n number of integrators for integrating respective output signals of said n hold circuits and providing output signals; n trigger pulse generators for producing respective trigger pulses when the amplitude of the output signals of the n integrators exceeds respective predetermined values; (n-1) step down circuits for frequency dividing the frequency of said regenerated first synchronizing signal into a 1/(n-1) frequency, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerating means as a clock pulse, and means for using trigger pulses produced by the trigger pulse generators as clear pulses, said trigger pulses being produced from the trigger pulse generators and which are synchronized with signals detected by the detecting means for deriving the signals for indicating the transmission period of the 1st to (n-2)th information signals, and for indicating the transmission period of the information signal which is a sum of the (n-1)th and nth information signals, respectively; a step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1), including means for using the regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse generated by the trigger pulse generator and which is synchronized with the signal detected by the detecting means for deriving a signal for indicating the transmission period of the nth information signal as a clear pulse; and a means for obtaining a logic product of the output signal of the step down circuit which uses the trigger pulse synchronized with the signals for indicating the transmission period of the sum of the (n-1) and nth information signals among the step down circuits for frequency dividing the frequency of the regenerated first synchronizing signal into 1/(n-1), and an inverted signal of the output signal of said step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1).

Claim 5

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchroNizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately indentifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signl synchronized with boundaries of said various information signals; a first detecting means for detecting a signal indicating the transmission period of either the second synchronizing signal representing the transmission period of said 1st to (n-2)th information signals, or the second synchronizing signal representing the transmission period of the information signal which is a sum of the (n-1)th and nth information signals; a second detecting means for detecting the second synchronizing signal representing the transmission period of said (n-1)th information signal; first and second hold circuits applied with output signals of said first and second detecting means, respectively, and for producing respective wide width output pulse signals when the amplitude of the output signals of the respective first and second detecting means is obtained at an interval less than a previously determined interval, respectively; first and second integrators for integrating output signals of said first and second hold circuits, respectively, and providing output signals; first and second trigger pulse genertors for generating respective trigger pulses when the amplitude of the output signals of the first and second integrators exceeds a predetermined value, respectively; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(n-1) and for producing (n-1) output signals having phases different by 2 pi /(n-1) radians from each other, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerator as a clock pulse, and means for using the output signal of said first trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the output signal of said second trigger pulse generator as a clear pulse; and a means for taking a logic product of an inverted output signal of said step down circuit, and a signal among the output signals of said ring counter and synchronized with the transmission period of a signal which is a sum of said (n-1)th information signal and nth information signal.

Claim 6

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchroNizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately indentifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signl synchronized with boundaries of said various information signals; a first detecting means for detecting a signal indicating the transmission period of either the second synchronizing signal representing the transmission period of said 1st to (n-2)th information signals, or the second synchronizing signal representing the transmission period of the information signal which is a sum of the (n-1)th and nth information signals; a second detecting means for detecting the second synchronizing signal representing the transmission period of said (n-1)th information signal; first and second hold circuits applied with output signals of said first and second detecting means, respectively, and for producing respective wide width output pulse signals when the amplitude of the output signals of the respective first and second detecting means is obtained at an interval less than a previously determined interval, respectively; first and second integrators for integrating output signals of said first and second hold circuits, respectively, and providing output signals; first and second trigger pulse genertors for generating respective trigger pulses when the amplitude of the output signals of the first and second integrators exceeds a predetermined value, respectively; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(n-1) and for producing (n-1) output signals having phases different by 2 pi /(n-1) radians from each other, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerator as a clock pulse, and means for using the output signal of said first trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the output signal of said second trigger pulse generator as a clear pulse; and a means for taking a logic product of an inverted output signal of said step down circuit, and a signal among the output signals of said ring counter and synchronized with the transmission period of a signal which is a sum of said (n-1)th information signal and nth information signal.

Claim 7

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signal synchronized with boundaries of said information signals; a detecting means for detecting and deriving a synchronizing signal indicating the transmission period of the (n-1)th information signal among said second synchronizing signals and providing an output signal; a hold circuit for producing a wide width output pulse signal at its output when the output signal of said detecting means is obtained at an interval less than a predetermined time interval; an integrator for integrating the output pulse signal of said hold circuit and providing an output signal; a trigger pulse generator for producing a trigger pulse when the amplitude of the output signal of said integrator exceeds a predetermined value; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(n-1) and for producing (n-1) output signals having phases which are 2 pi (n -1) radians different from each other, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of the trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse of the trigger pulse generator as a clear pulse; and a means for producing a logic product of an inverted signal of the output signal of said step down circuit and a signal synchronized with the transmission period of a signal which is the sum of the (n-1)th and nth information signals among the output signals of said ring counter.

Claim 8

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted in the composite signal at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signal synchronized with boundaries of said information signals; a detecting means for detecting and deriving a synchronizing signal indicating the transmission period of the (n-1)th information signal among said second synchronizing signals and providing an output signal; a hold circuit for producing a wide width output pulse signal at its output when the output signal of said detecting means is obtained at an interval less than a predetermined time interval; an integrator for integrating the output pulse signal of said hold circuit and providing an output signal; a trigger pulse generator for producing a trigger pulse when the amplitude of the output signal of said integrator exceeds a predetermined value; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(n-1) and for producing (n-1) output signals having phases which are 2 pi (n -1) radians different from each other, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of the trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse of the trigger pulse generator as a clear pulse; and a means for producing a logic product of an inverted signal of the output signal of said step down circuit and a signal synchronized with the transmission period of a signal which is the sum of the (n-1)th and nth information signals among the output signals of said ring counter.

Claim 9

A synchronizing signal regenerator for regenerating synchronizing signals synchronized with respective transmission periods of a video signal and an audio signal by receiving a composite signal including a video signal and an audio signal arranged in a predetermined sequence and for durations having a predetermined integral ratio, the composite signal further comprising pulse coded first and second synchronizing signals required for the regeneration of said video and audio signals, a pulse coded third synchronizing signal synchronized with at least the boundary of said video signal and said audio signal and having a repetition period corresponding to an integral multiple of the repetition frequency of the transmission period of said video signal or audio signal, pulse coded fourth and fifth synchronizing signals for indicating the transmission period of said video and audio signals and a further synchronizing signal having a fixed pulse pattern and including a predetermined number of pulses for detecting the insertion position in the composite signal of said synchronizing signals, wherein the synchronizing signals are inserted at a predetermined repetition period in a predetermined duration in the respective video and audio signals, the regenerator comprising: a means for detecting said fixed pulse pattern of the further synchronizing signal and for deriving an output signal for gating out from the composite signal the synchronizing signals; a means for detecting said third synchronizing signal, including means for using the output signal of the fixed pulse pattern detecting means and means for regenerating said third synchronizing signal; a means for deriving said fourth and fifth synchronizing signals including means for using The output signal of the fixed pulse pattern detecting means; a plurality of hold circuits for producing wide width output pulse signals when the derived fourth and fifth synchronizing signals have a time interval less than a predetermined time interval, respectively; a plurality of integrating circuits for integrating respective output pulse signals of said hold circuits and providing respective output signals; a means for producing trigger pulses when the amplitude of the respective output signals of said integrating circuits exceeds predetermined values, respectively; and a means for generating signals synchronized with the respective transmission periods of said video and audio signals, including means for dividing the frequency of said regenerated third synchronizing signal including means for using the regenerated third synchronizing signal of the synchronizing signal regenerating means as a clock pulse and means for using the trigger pulses produced by said trigger pulse generating means as clear pulses.

Claim 10

A synchronizing signal regenerator for regenerating synchronizing signals synchronized with respective transmission periods of a video signal and an audio signal by receiving a composite signal including a video signal and an audio signal arranged in a predetermined sequence and for durations having a predetermined integral ratio, the composite signal further comprising pulse coded first and second synchronizing signals required for the regeneration of said video and audio signals, a pulse coded third synchronizing signal synchronized with at least the boundary of said video signal and said audio signal and having a repetition period corresponding to an integral multiple of the repetition frequency of the transmission period of said video signal or audio signal, pulse coded fourth and fifth synchronizing signals for indicating the transmission period of said video and audio signals and a further synchronizing signal having a fixed pulse pattern and including a predetermined number of pulses for detecting the insertion position in the composite signal of said synchronizing signals, wherein the synchronizing signals are inserted at a predetermined repetition period in a predetermined duration in the respective video and audio signals, the regenerator comprising: a means for detecting said fixed pulse pattern of the further synchronizing signal and for deriving an output signal for gating out from the composite signal the synchronizing signals; a means for detecting said third synchronizing signal, including means for using the output signal of the fixed pulse pattern detecting means and means for regenerating said third synchronizing signal; a means for deriving said fourth and fifth synchronizing signals including means for using The output signal of the fixed pulse pattern detecting means; a plurality of hold circuits for producing wide width output pulse signals when the derived fourth and fifth synchronizing signals have a time interval less than a predetermined time interval, respectively; a plurality of integrating circuits for integrating respective output pulse signals of said hold circuits and providing respective output signals; a means for producing trigger pulses when the amplitude of the respective output signals of said integrating circuits exceeds predetermined values, respectively; and a means for generating signals synchronized with the respective transmission periods of said video and audio signals, including means for dividing the frequency of said regenerated third synchronizing signal including means for using the regenerated third synchronizing signal of the synchronizing signal regenerating means as a clock pulse and means for using the trigger pulses produced by said trigger pulse generating means as clear pulses.

Claim 11

A synchronizing signal regenerator for regenerating a first synchronizing signal including a pulse series having a predetermined certain repetition frequency being intermittently transmitted at a predetermined period for a predetermined certain duration, and a second synchronizing signal synchronized with boundaries of the pulse series of the first synchronizing signal and inserted in a repetition period for a period equal to the width of the pulse series intermittently inserted, from a composite signal including said first and second synchronizing signals, the regenerator comprising: a means for detecting said second synchronizing signal and for regenerating said detected second synchronizing signal; a means for detecting and deriving the pulse series of said first synchronizing signal; a counter for counting the pulse series derived by the pulse series deriving means and for producing a logic ''''1'''' output signal when a predetermined number of pulses has been counted and being cleared by said regenerated second synchronizing signal; a trigger pulse generator for producing a trigger pulse when said counter produces the ''''1'''' signal; and a means for generating a signal synchronized with said intermittently transmitted period of the pulse series of said first synchronizing signal, said generating means including a frequency dividing means for dividing the frequency of said regenerated second synchronizing signal obtained from the second synchronizing signal regenerating means including means for using the regenerated second synchronizing signal as a clock pulse and means for using the trigger pulse obtained from said trigger pulse generator as a clear pulse.

Claim 12

A synchronizing signal regenerator for regenerating a first synchronizing signal including a pulse series having a predetermined certain repetition frequency being intermittently transmitted at a predetermined period for a predetermined certain duration, and a second synchronizing signal synchronized with boundaries of the pulse series of the first synchronizing signal and inserted in a repetition period for a period equal to the width of the pulse series intermittently inserted, from a composite signal including said first and second synchronizing signals, the regenerator comprising: a means for detecting said second synchronizing signal and for regenerating said detected second synchronizing signal; a means for detecting and deriving the pulse series of said first synchronizing signal; a counter for counting the pulse series derived by the pulse series deriving means and for producing a logic ''''1'''' output signal when a predetermined number of pulses has been counted and being cleared by said regenerated second synchronizing signal; a trigger pulse generator for producing a trigger pulse when said counter produces the ''''1'''' signal; and a means for generating a signal synchronized with said intermittently transmitted period of the pulse series of said first synchronizing signal, said generating means including a frequency dividing means for dividing the frequency of said regenerated second synchronizing signal obtained from the second synchronizing signal regenerating means including means for using the regenerated second synchronizing signal as a clock pulse and means for using the trigger pulse obtained from said trigger pulse generator as a clear pulse.

Claim 13

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized wIth the transmission period of said respective information signals, the regenerator comprising: a means for detecting and regenerating the first synchronizing signal synchronized with the boundaries of the various information signals; n number of detecting means for detecting respective coded signals of the plurality of the second synchronizing signals, and for detecting signals for indicating the transmission periods of said 1st to (n-2)th information signals, a signal indicating the transmission period of a sum signal of the (n-1)th and nth information signals, and a signal indicating the transmission period of the nth information signal n counters for counting the signals obtained from the n means for detecting signals indicating the transmission periods respectively, and for producing a logic ''''1'''' output signal when a predetermined count number is reached and being cleared by the regenerated first synchronizing signal; n trigger pulse generators for generating respective trigger pulses when each of said n counters produces an output signal; (n-1) step down circuits for frequency dividing the frequency of said regenerated first synchronizing signal into output signals of 1/(n-1) frequency, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerating means as a clock pulse, and means for using the trigger pulses generated by the trigger pulse generators as a clear pulse, each of said trigger pulses being synchronized with signals detected by the detecting means for detecting the signals for indicating the transmission periods of the 1st to (n-2)th information signals, and for indicating the transmission period of the sum signal of the (n-1)th and nth information signals, respectively; a step down circuit for dividing the frequency of the regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using the regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse generated by the trigger pulse generator synchronized with the signal detected by the synchronizing signal detecting means for indicating the transmission period of the nth information signal; and a means for obtaining a logic product of the output signal of the step down circuit synchronized with the transmission period of the sum signal of the (n-1)th and nth information signals among the step down circuits for dividing the input frequency into 1/(n-1), and an inverted signal of the output signal of said step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1).

Claim 14

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the 1st to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) X M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized wIth the transmission period of said respective information signals, the regenerator comprising: a means for detecting and regenerating the first synchronizing signal synchronized with the boundaries of the various information signals; n number of detecting means for detecting respective coded signals of the plurality of the second synchronizing signals, and for detecting signals for indicating the transmission periods of said 1st to (n-2)th information signals, a signal indicating the transmission period of a sum signal of the (n-1)th and nth information signals, and a signal indicating the transmission period of the nth information signal n counters for counting the signals obtained from the n means for detecting signals indicating the transmission periods respectively, and for producing a logic ''''1'''' output signal when a predetermined count number is reached and being cleared by the regenerated first synchronizing signal; n trigger pulse generators for generating respective trigger pulses when each of said n counters produces an output signal; (n-1) step down circuits for frequency dividing the frequency of said regenerated first synchronizing signal into output signals of 1/(n-1) frequency, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerating means as a clock pulse, and means for using the trigger pulses generated by the trigger pulse generators as a clear pulse, each of said trigger pulses being synchronized with signals detected by the detecting means for detecting the signals for indicating the transmission periods of the 1st to (n-2)th information signals, and for indicating the transmission period of the sum signal of the (n-1)th and nth information signals, respectively; a step down circuit for dividing the frequency of the regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using the regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse generated by the trigger pulse generator synchronized with the signal detected by the synchronizing signal detecting means for indicating the transmission period of the nth information signal; and a means for obtaining a logic product of the output signal of the step down circuit synchronized with the transmission period of the sum signal of the (n-1)th and nth information signals among the step down circuits for dividing the input frequency into 1/(n-1), and an inverted signal of the output signal of said step down circuit for dividing the frequency of the regenerated first synchronizing signal into 1/M(n-1).

Claim 15

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the lst to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (N-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) x M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission periods of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission periods of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signal synchronized with boundaries of said various information signals; a first detecting means for detecting a signal indicating the transmission period of either the second synchronizing signal indicating the transmission period of said lst to (n-2)th information signals, or the second synchronizing signal for indicating the transmission period of the information signal which is a sum of the (n-1)th and nth information signals; a second detecting means for detecting the second synchronizing signal for indicating the transmission period of said (n-1)th information signal; first and second counters for counting the detected signals detected by the first and second detecting means, and for producing respective logic ''''1'''' signals when the count reaches a predetermined number, and being cleared by said regenerated first synchronizing signal; first and second trigger pulse generators for producing respective trigger pulses when a logic ''''1'''' signal is produced from said first and second counters; a ring counter for dividing the frequency of said regenerated first synchronizing signal in 1/(n-1) and for producing (n-1) output signals having phases different from each other by 2 pi /(n-1) radians, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerator as a clock pulse, and means for using the trigger pulse of said first trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of said second trigger pulse generator as a clear pulse; and a means for taking the logic product of an inverted output signal of said step down circuit, and a signal among the output signals of said ring counter and synchronized with the transmission period of the signal which is a sum of said (n-1)th information signal and said nth information signal.

Claim 16

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the lst to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (N-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) x M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission periods of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately identifiable and inserted in a predetermined portion of said information signals, and for generating signals synchronized with the transmission periods of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for regenerating said first synchronizing signal synchronized with boundaries of said various information signals; a first detecting means for detecting a signal indicating the transmission period of either the second synchronizing signal indicating the transmission period of said lst to (n-2)th information signals, or the second synchronizing signal for indicating the transmission period of the information signal which is a sum of the (n-1)th and nth information signals; a second detecting means for detecting the second synchronizing signal for indicating the transmission period of said (n-1)th information signal; first and second counters for counting the detected signals detected by the first and second detecting means, and for producing respective logic ''''1'''' signals when the count reaches a predetermined number, and being cleared by said regenerated first synchronizing signal; first and second trigger pulse generators for producing respective trigger pulses when a logic ''''1'''' signal is produced from said first and second counters; a ring counter for dividing the frequency of said regenerated first synchronizing signal in 1/(n-1) and for producing (n-1) output signals having phases different from each other by 2 pi /(n-1) radians, including means for using the first synchronizing signal regenerated by said first synchronizing signal regenerator as a clock pulse, and means for using the trigger pulse of said first trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of said second trigger pulse generator as a clear pulse; and a means for taking the logic product of an inverted output signal of said step down circuit, and a signal among the output signals of said ring counter and synchronized with the transmission period of the signal which is a sum of said (n-1)th information signal and said nth information signal.

Claim 17

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the lst to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) x M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately indentifiable and inserted in a predetermined portion of said information signals, and for generating signal synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for rEgenerating said first synchronizing signal synchronized with boundaries of said information signals; a detecting means for detecting and deriving a synchronizing signal indicating the transmission period of the (n-1)th information signal among said second synchronizing signals; a counter for counting the derived signal derived by said synchronizing signal deriving means for indicating said transmission period of the (n-1)th information signal, and for producing a logic ''''1'''' signal when the count number reaches a predetermined number and being cleared by said regenerated first synchronizing signal; a trigger pulse generator for producing a trigger pulse when said counter produces the logic ''''1'''' output signal; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(N-1) and for producing (n-1) output signals having phases 2 pi /(n-1) radians different from each other, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of the trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse of the trigger pulse generator as a clear pulse; and a means for producing a logic product of an inverted signal of the output signal of said step down circuit and a signal synchronized the transmission period at a sum of the (n-1)th and nth information signals among the output signals of said ring counter.

Claim 18

A synchronizing signal regenerator for receiving a composite signal including various information signals inserted at certain predetermined positions, in which n information signals are divided in predetermined certain time units, and in which the lst to (n-2)th information signals are arranged in a phase shift relationship in one time unit and at a repetition period of each (n-1) of said time units, the (n-1)th information signal is arranged with respect to the rest of the portion of the (n-1) time units for a time corresponding to (n-1) x M times the units, wherein M is a positive integer, and the nth information signal is arranged in the rest of the portion at which the (n-1)th information signal is not arranged, and a first synchronizing signal synchronized with boundaries of the information signals and a plurality of second synchronizing signals for representing the transmission period of said various information signals and required for the regeneration of said information signals being pulse coded in a manner separately indentifiable and inserted in a predetermined portion of said information signals, and for generating signal synchronized with the transmission period of said respective information signals, the regenerator comprising: a means for detecting said first synchronizing signal and for rEgenerating said first synchronizing signal synchronized with boundaries of said information signals; a detecting means for detecting and deriving a synchronizing signal indicating the transmission period of the (n-1)th information signal among said second synchronizing signals; a counter for counting the derived signal derived by said synchronizing signal deriving means for indicating said transmission period of the (n-1)th information signal, and for producing a logic ''''1'''' signal when the count number reaches a predetermined number and being cleared by said regenerated first synchronizing signal; a trigger pulse generator for producing a trigger pulse when said counter produces the logic ''''1'''' output signal; a ring counter for dividing the frequency of said regenerated first synchronizing signal into 1/(N-1) and for producing (n-1) output signals having phases 2 pi /(n-1) radians different from each other, including means for using said regenerated first synchronizing signal as a clock pulse, and means for using the trigger pulse of the trigger pulse generator as a clear pulse; a step down circuit for dividing the frequency of said regenerated first synchronizing signal into an output signal of 1/M(n-1) frequency, including means for using said regenerated first synchronizing signal as a clock pulse and means for using the trigger pulse of the trigger pulse generator as a clear pulse; and a means for producing a logic product of an inverted signal of the output signal of said step down circuit and a signal synchronized the transmission period at a sum of the (n-1)th and nth information signals among the output signals of said ring counter.

Claim 19

A synchronizing signal regenerator for regenerating synchronizing signals synchronized with respective transmission periods of a video signal and an audio signal by receiving a composite signal including a video signal and an audio signal arranged in a predetermined sequence and for durations having a predetermined integral ratio, the composite signal further comprising pulse coded first and second synchronizing signals required for the regeneration of said video and audio signals, a pulse coded third synchronizing signal synchronized with at least the boundary of said video signal and audio signal and having a repetition period corresponding to an integral multiple of the repetition frequency of the transmission period of said video signal or said audio signal, pulse coded fourth and fifth synchronizing signals for indicating the transmission period of said video and audio signals and a further synchronizing signal having a fixed pulse pattern and including a predetermined number of pulses for detecting the insertion position of said synchronizing signals, wherein the synchronizing signals are inserted in the composite signal at a predetermined repetition period in a predetermined duration in the respective video and audio signals, the regenerator comprising: a means for detecting said fixed pulse pattern of the further synchronizing signal and for deriving an output signal for gating out from the composite signal the synchronizing signals; a means for detecting said third synchronizing signal including means for using the output signal of the fixed pulse pattern detecting means, and means for generating said third synchronizing signal a means for deriving said fourth and fifth synchronizing signals including means for using the output signal of the fixed pulse pattern detecting means; a plurality of counters for counting the fourth and fifth synchronizing signals derived respectively and for producing respectively a logic ''''1'''' output signal when a predetermined number of pulses has been counted and being cleared by said regenerated third synchronizing signal; a plurality of trigger pulse generators for producing respectiVe trigger pulses when said counters produce the logic ''''1'''' output signal; and a means for generating signals synchronized with the respective transmission periods of said video and audio signals by dividing the frequency of said regenerated third synchronizing signal including means for using the generated third synchronizing signal of the third synchronizing signal regenerating means as a clock pulse and the trigger pulses produced by said trigger pulse generators as clear pulses.

Claim 20

A synchronizing signal regenerator for regenerating synchronizing signals synchronized with respective transmission periods of a video signal and an audio signal by receiving a composite signal including a video signal and an audio signal arranged in a predetermined sequence and for durations having a predetermined integral ratio, the composite signal further comprising pulse coded first and second synchronizing signals required for the regeneration of said video and audio signals, a pulse coded third synchronizing signal synchronized with at least the boundary of said video signal and audio signal and having a repetition period corresponding to an integral multiple of the repetition frequency of the transmission period of said video signal or said audio signal, pulse coded fourth and fifth synchronizing signals for indicating the transmission period of said video and audio signals and a further synchronizing signal having a fixed pulse pattern and including a predetermined number of pulses for detecting the insertion position of said synchronizing signals, wherein the synchronizing signals are inserted in the composite signal at a predetermined repetition period in a predetermined duration in the respective video and audio signals, the regenerator comprising: a means for detecting said fixed pulse pattern of the further synchronizing signal and for deriving an output signal for gating out from the composite signal the synchronizing signals; a means for detecting said third synchronizing signal including means for using the output signal of the fixed pulse pattern detecting means, and means for generating said third synchronizing signal a means for deriving said fourth and fifth synchronizing signals including means for using the output signal of the fixed pulse pattern detecting means; a plurality of counters for counting the fourth and fifth synchronizing signals derived respectively and for producing respectively a logic ''''1'''' output signal when a predetermined number of pulses has been counted and being cleared by said regenerated third synchronizing signal; a plurality of trigger pulse generators for producing respectiVe trigger pulses when said counters produce the logic ''''1'''' output signal; and a means for generating signals synchronized with the respective transmission periods of said video and audio signals by dividing the frequency of said regenerated third synchronizing signal including means for using the generated third synchronizing signal of the third synchronizing signal regenerating means as a clock pulse and the trigger pulses produced by said trigger pulse generators as clear pulses.