US3921101A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mosfet clock
Assignee: Electronic Arrays Inc
•
Filing: 1973-10-05
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Granted: 1975-11-18
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Expires: 1993-10-05
Abstract
Abstract A clock circuit particularly for MOSFET integrated circuit electronics is suggested, wherein RC elements are discrete elements external to an IC chip, while the timing of occurrence of a rapid charge change is internally controlled by MOSFET elements in that chip. This control circuit includes a hysteresis circuit, a delay and a switch, for example, for discharging the capacitor at the end of a cycle. The hysteresis circuit responds to a particular charge state of the capacitor to turn the switch on, the hysteresis circuit reverts belatedly to the reverse state for turning the switch off again, which turning off is further delayed by the delay circuitry so that the capacitor discharges fully.
Inventors
- 👤 Michael R Mccoy
- 👤 Terry R Walther
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 07:23
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/354
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
416 words
An oscillator circuit for cooperation with and use in integrated circuit chips of the MOSFET variety, comprising: an RC circuit connected between an operating voltage and ground and having a terminal, the RC circuit composed of discrete circuit elements which include at least one capacitor and at least one resistor connected thereto, the potential of said terminal representing the charge state of the capacitor, the potential of said terminal changing gradully from a first charge state of the capacitor towards a second charge state thereof through current flow through the resistor; a hysteresis circuit in the chip having an input terminal connected through an interface connector to the terminal of said RC circuit and having an internal output terminal, said circuit being constructed from MOSFET elements and being connected to operating potential and ground potential as applied to the chip to have in each instant a first or a second switching state in which respectively first and second level outputs are effective at the internal output terminal, one of the first and second level outputs having value close to ground potential, the other one of the first and second level outputs being different from ground, the hysteresis circuit provided for switching from the first level output to the second level output when the potential of the terminal reaches a level corresponding to the second charge state of the capacitor, and for returning to the first level output when the potential at the terminal is at a level different from the level as corresponding to the second charge state, but corresponding to a third charge state in between the first charge state and the second charge state; a delay circuit connected to the output of said hysteresis circuit to provide a switching signal when the hysteresis circuit switches its output from the first to the second level and a turn-off signal when the hysteresis circuit switches its output from the particular second to the first level but at a particular delay; and an electronic switch connected to the capacitor for rapidly changing the charge of the capacitor from the second towards the first charge state in response to the switching signal from the delay circuit, the electronic switch being turned off when the delay circuit transmits to the switch delayedly the change of the hysteresis circuit output from the second level to the first level, the delay being sufficient so that the electronic switch is not turned off until the capacitor has reached the first charge state.
Claim 2
Dependent Claim
416 words
An oscillator circuit for cooperation with and use in integrated circuit chips of the MOSFET variety, comprising: an RC circuit connected between an operating voltage and ground and having a terminal, the RC circuit composed of discrete circuit elements which include at least one capacitor and at least one resistor connected thereto, the potential of said terminal representing the charge state of the capacitor, the potential of said terminal changing gradully from a first charge state of the capacitor towards a second charge state thereof through current flow through the resistor; a hysteresis circuit in the chip having an input terminal connected through an interface connector to the terminal of said RC circuit and having an internal output terminal, said circuit being constructed from MOSFET elements and being connected to operating potential and ground potential as applied to the chip to have in each instant a first or a second switching state in which respectively first and second level outputs are effective at the internal output terminal, one of the first and second level outputs having value close to ground potential, the other one of the first and second level outputs being different from ground, the hysteresis circuit provided for switching from the first level output to the second level output when the potential of the terminal reaches a level corresponding to the second charge state of the capacitor, and for returning to the first level output when the potential at the terminal is at a level different from the level as corresponding to the second charge state, but corresponding to a third charge state in between the first charge state and the second charge state; a delay circuit connected to the output of said hysteresis circuit to provide a switching signal when the hysteresis circuit switches its output from the first to the second level and a turn-off signal when the hysteresis circuit switches its output from the particular second to the first level but at a particular delay; and an electronic switch connected to the capacitor for rapidly changing the charge of the capacitor from the second towards the first charge state in response to the switching signal from the delay circuit, the electronic switch being turned off when the delay circuit transmits to the switch delayedly the change of the hysteresis circuit output from the second level to the first level, the delay being sufficient so that the electronic switch is not turned off until the capacitor has reached the first charge state.
Claim 3
Dependent Claim
88 words
An oscillator circuit as in claim 1, wherein the hysteresis circuit is constructed from plural MOSFET elements connected between operating voltage and ground and establishing a first current path being conductive as the first output state of the hysteresis circuit and maintained while the capacitor changes charge state gradually from the first to the second state, and a second conductive current path being conductive as the second output state of the hysteresis circuit and maintained while the capacitor changes charge state from the second to the third state.
Claim 4
Dependent Claim
95 words
An oscillator circuit as in claim 2, wherein the first conductive current path includes a first FET and second FET with a junction, the first FET connected to said terminal; and a circuit connected also to said terminal and connecting the junction to the gate of the second FET to obtain cutoff of the second FET when the potential at said terminal controls conduction through the first to obtain a particular potential at said junction dependent on the voltage divider ratio of the impendance of the first and second FETs of the first current path.
Claim 5
Dependent Claim
45 words
An oscillator as in claim 3, wherein said circuit includes a third FET having its source-to-drain path connected serially between the drain of the first FET and the gate of the second FET, the gate of of the third FET being connected to said terminal.
Claim 6
Dependent Claim
69 words
An oscillator as in claim 4, wherein the gate of the second FET connects to a fourth FET for biasing the gate to operating as long as the third FET is not conductive, the first, third and fourth FETs establishing the second conductive path, when the second FET is not conductive, the impedance ratio of first, third and fourth FETs determining the onset of conduction of the second FET.
Claim 7
Dependent Claim
139 words
An oscillator circuit as in claim 1, wherein the hysteresis circuit includes a pair of serially connected FETs with a common gate connected to said RC circuit terminal, the source of one of the FETs being connected to ground, the drain of the other one of the FETs being connected to a noed; a third FET connected for biasing the node to operating potential, a fourth FET having its gate connected to said node, the node being said output terminal, having its source electrode connected to the drain-to-source junction between the first and second FETs to provide feedback thereto tending to impede conduction of at least one of the serially connected FETs and tending to impede change to non-conduction respectively on conduction and non-conduction of the fourth FET, the fourth FET having its drain electrode connected to operating potential.
Claim 8
Dependent Claim
42 words
An oscillator as in claim 1, wherein the capacitor and resistor of the RC circuit are serially connected between an operating voltage and ground, said electronic switch connected across the capacitor, said third charge state being substantially complete discharge of the capacitor.
Claim 9
Dependent Claim
280 words
In an electronic circut, the improvement of a hysteresis circuit having first, second, and third MOSFETs, each MOSFET having drain, source and gate electrodes, the first, second and third MOSFETs being connected serially with their source and draIn electrodes to each other and between operating voltage and ground, the gates of the first and second MOSFETs receiving a control voltage, the gate and drain of the third MOSFET being connected to receive operating potential; and a fourth MOSFET having its gate connected to a junction of the third and second MOSFET as defined by source-to-drain connetion of these MOSFETs, the source of the fourth MOSFET being connected to a junction between the first and second MOSFETs as defined by source-to-drain connection of these MOSFETs, the drain of the fourth MOSFET connected to operation potential, so that the fourth MOSFET remains conductive for a first range of the control voltage having value above the threshold of conduction of the first and second MOSFET but wherein bias applied by the drain of the fourth MOSFET to the drain of the second MOSFET inhibits conduction thereof by operation of the impedance divider ratio effective through current flow through the first and fourth MOSFETs, and wherein for a second range of control voltages, overlapping the first range, the impedance divider ratio as effective on the gate of the fourth transistor by operation of current flow through the first, second and third MOSFETs keeps the fourth transistor non-conductive, until the control voltage has reached a value within said first range, causing the first and second MOSFETs to become regeneratively conductive under control of a bias change as resulting from rapid non-conduction of the fourth MOSFET.
Claim 10
Dependent Claim
280 words
In an electronic circut, the improvement of a hysteresis circuit having first, second, and third MOSFETs, each MOSFET having drain, source and gate electrodes, the first, second and third MOSFETs being connected serially with their source and draIn electrodes to each other and between operating voltage and ground, the gates of the first and second MOSFETs receiving a control voltage, the gate and drain of the third MOSFET being connected to receive operating potential; and a fourth MOSFET having its gate connected to a junction of the third and second MOSFET as defined by source-to-drain connetion of these MOSFETs, the source of the fourth MOSFET being connected to a junction between the first and second MOSFETs as defined by source-to-drain connection of these MOSFETs, the drain of the fourth MOSFET connected to operation potential, so that the fourth MOSFET remains conductive for a first range of the control voltage having value above the threshold of conduction of the first and second MOSFET but wherein bias applied by the drain of the fourth MOSFET to the drain of the second MOSFET inhibits conduction thereof by operation of the impedance divider ratio effective through current flow through the first and fourth MOSFETs, and wherein for a second range of control voltages, overlapping the first range, the impedance divider ratio as effective on the gate of the fourth transistor by operation of current flow through the first, second and third MOSFETs keeps the fourth transistor non-conductive, until the control voltage has reached a value within said first range, causing the first and second MOSFETs to become regeneratively conductive under control of a bias change as resulting from rapid non-conduction of the fourth MOSFET.
Claim 11
Dependent Claim
38 words
In a circuit as in claim 8, wherein the control voltage is saw-tooth voltage, and including circuit means connected to the gate of the fourth transistor for controlling the generation of the saw-tooth voltage to establish an oscillator.
Claim 12
Dependent Claim
368 words
An oscillator circuit for cooperation with and use in an integrated circuit chip of the MOSFET variety, comprising: an RC circuit made of discrete circuit elements which include a capacitor and a resistor serially connected between an operating voltage and ground and having a junction terminal, the potential of said terminal representing the charge state of the capacitor; a MOSFET switch having its main electrodes connected across the capacitor to discharge the capacitor when conductive, the capacitor charging via said resistor when the switch is not conductive; a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to said junction terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feed-back to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish a particular voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine a second particular voltage value for the second MOSFET is turned off, so that the third MOSFET is conductive when the second is not and vice versa, the first and second MOSFET rendered conductive when the capacitor has charged to provide said first particular value, and non-conductive, when the capacitor has lost a significant charge due to discharge through the said switch, so that the second particular voltage is effective at said terminal; and a delay circuit in the chip connected to the third MOSFET and to the gate of the switch for rendering the switch conductive at a particular delay, when the third MOSFET is rendered conductive and for rendering the switch non-conductive when the third MOSFET is rendered non-conductIve and at a particular delay so that the capacitor is discharged completely.
Claim 13
Dependent Claim
368 words
An oscillator circuit for cooperation with and use in an integrated circuit chip of the MOSFET variety, comprising: an RC circuit made of discrete circuit elements which include a capacitor and a resistor serially connected between an operating voltage and ground and having a junction terminal, the potential of said terminal representing the charge state of the capacitor; a MOSFET switch having its main electrodes connected across the capacitor to discharge the capacitor when conductive, the capacitor charging via said resistor when the switch is not conductive; a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to said junction terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feed-back to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish a particular voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine a second particular voltage value for the second MOSFET is turned off, so that the third MOSFET is conductive when the second is not and vice versa, the first and second MOSFET rendered conductive when the capacitor has charged to provide said first particular value, and non-conductive, when the capacitor has lost a significant charge due to discharge through the said switch, so that the second particular voltage is effective at said terminal; and a delay circuit in the chip connected to the third MOSFET and to the gate of the switch for rendering the switch conductive at a particular delay, when the third MOSFET is rendered conductive and for rendering the switch non-conductive when the third MOSFET is rendered non-conductIve and at a particular delay so that the capacitor is discharged completely.
Claim 14
Dependent Claim
367 words
An oscillator circuit for cooperation with and use in integrated circuit chips of the MOSFET variety, comprising: an RC circuit connected between an operating voltage and ground and having a terminal, the RC circuit composed of discrete circuit elements which include at least one capacitor and at least one resistor connected thereto, the potential of said terminal representing the charge state of the capacitor, the potential of said terminal changing gradually from a first charge state towards a second charge state through current flow through the resistor; a MOSFET device with gate input, drain and source electrodes, and a feedback input, the gate connected to ground; a first MOSFET with gate to drain connection to the operating voltage and having its source connected to the drain of said device and establishing a particular divider ratio therewith; a feedback MOSFET having its gate connected to the source of said first MOSFET, its drain connected to receive operating potential and its source connected to the feedback input of said MOSFET device and establishing another impedance ratio with part of the MOSFET device to impede onset of conduction through the MOSFET device when said feedback MOSFET is conductive, so that the device will be rendered conductive in dependence upon the other impedance ratio as detection response to reaching of the second charge state by the capacitor and to impede onset of non-conduction of the MOSFET device when the feedback MOSFET is non-conductive, but to render the device non-conductive in regenerative action in dependence upon the particular divider ratio for the third charge state of the capacitor; a switch connected to the capacitor for rapidly changing its charge state from the second to the first charge state when conductive; and circuit means connected for controlling the switch in dependence upon conduction and non-conduction of the MOSFET device, for causing the switch to rapidly change said capacitor charge state after the MOSFET device has been rendered conductive and turning the switch off at a delay following the rendering of the MOSFET device to be non-conductive, the delay being sufficient to cause the capacitor to reach the first charge state from the third charge state which caused the MOSFET device to become non-conductive.
Claim 15
Dependent Claim
367 words
An oscillator circuit for cooperation with and use in integrated circuit chips of the MOSFET variety, comprising: an RC circuit connected between an operating voltage and ground and having a terminal, the RC circuit composed of discrete circuit elements which include at least one capacitor and at least one resistor connected thereto, the potential of said terminal representing the charge state of the capacitor, the potential of said terminal changing gradually from a first charge state towards a second charge state through current flow through the resistor; a MOSFET device with gate input, drain and source electrodes, and a feedback input, the gate connected to ground; a first MOSFET with gate to drain connection to the operating voltage and having its source connected to the drain of said device and establishing a particular divider ratio therewith; a feedback MOSFET having its gate connected to the source of said first MOSFET, its drain connected to receive operating potential and its source connected to the feedback input of said MOSFET device and establishing another impedance ratio with part of the MOSFET device to impede onset of conduction through the MOSFET device when said feedback MOSFET is conductive, so that the device will be rendered conductive in dependence upon the other impedance ratio as detection response to reaching of the second charge state by the capacitor and to impede onset of non-conduction of the MOSFET device when the feedback MOSFET is non-conductive, but to render the device non-conductive in regenerative action in dependence upon the particular divider ratio for the third charge state of the capacitor; a switch connected to the capacitor for rapidly changing its charge state from the second to the first charge state when conductive; and circuit means connected for controlling the switch in dependence upon conduction and non-conduction of the MOSFET device, for causing the switch to rapidly change said capacitor charge state after the MOSFET device has been rendered conductive and turning the switch off at a delay following the rendering of the MOSFET device to be non-conductive, the delay being sufficient to cause the capacitor to reach the first charge state from the third charge state which caused the MOSFET device to become non-conductive.
Claim 16
Dependent Claim
204 words
In an electronic circuit of the integrated variety and using MOSFETs as active elements, wherein a control voltage appears at an internal terminal changing value for a range up to a first value and back to and exceeding a second value, the improvement comprising: a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to the control terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feedback to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish the first voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine to the second voltage value for the second MOSFET is turned off.
Claim 17
Dependent Claim
204 words
In an electronic circuit of the integrated variety and using MOSFETs as active elements, wherein a control voltage appears at an internal terminal changing value for a range up to a first value and back to and exceeding a second value, the improvement comprising: a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to the control terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feedback to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish the first voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine to the second voltage value for the second MOSFET is turned off.
Claim 18
Dependent Claim
360 words
In an oscillator circuit wherein an RC circuit with control switch is provided for obtaining gradual charge state changes on the capacitor through the resistor for open switch and rapid charge state changes in the opposite direction for closed switch, there being a junction terminal from which a voltage can be derived iN relation to ground, the improvement comprising: a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to said junction terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feed-back to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish a particular voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine a second particular voltage value for the second MOSFET is turned off; circuit means connecting the said junction terminal to the gates of the first and second MOSFETs for applying said voltage thereto, so that the particular voltage occurs following a gradual change in charge state for turning the second MOSFET on, while the second particular voltage occurs during a rapid change in charge state; and a delay circuit in the chip connected to the third MOSFET and to the gate of the switch for closing the switch at a particular delay, when the third MOSFET is rendered conductive and for opening the switch when the third MOSFET is rendered non-conductive and at a particular delay, so that the capacitor charge returns completely to a particular value from which to change charge gradullay to a value at which the particular voltage is again applied to the gates of the first and second MOSFETs.
Claim 19
Dependent Claim
360 words
In an oscillator circuit wherein an RC circuit with control switch is provided for obtaining gradual charge state changes on the capacitor through the resistor for open switch and rapid charge state changes in the opposite direction for closed switch, there being a junction terminal from which a voltage can be derived iN relation to ground, the improvement comprising: a first and second MOSFET in the chip each having source, drain and gate electrodes, the source of the first MOSFET being grounded, the drain of the first MOSFET being connected to the source of the second MOSFET, the gates of the first and second MOSFET being connected to said junction terminal; a third MOSFET in the chip having its gate connected to the drain of the second MOSFET, its drain connected to receive operating potential and its source connected as a feed-back to the interconnected drain and source of the first and second MOSFETs and acting with the first MOSFET in voltage divider configuration to establish a particular voltage value for which the second MOSFET is turned on; a fourth MOSFET in the chip connected to be permanently conductive and connected to the drain of the second MOSFET to act therewith in impedance divider configuration to determine a second particular voltage value for the second MOSFET is turned off; circuit means connecting the said junction terminal to the gates of the first and second MOSFETs for applying said voltage thereto, so that the particular voltage occurs following a gradual change in charge state for turning the second MOSFET on, while the second particular voltage occurs during a rapid change in charge state; and a delay circuit in the chip connected to the third MOSFET and to the gate of the switch for closing the switch at a particular delay, when the third MOSFET is rendered conductive and for opening the switch when the third MOSFET is rendered non-conductive and at a particular delay, so that the capacitor charge returns completely to a particular value from which to change charge gradullay to a value at which the particular voltage is again applied to the gates of the first and second MOSFETs.
References Cited (Backward Citations)
US3735277A
Cited
US3708757A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-11-17 | 1979-05-19 | 1979-11-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-11-17 | 1983-05-19 | 1983-11-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-11-17 | 1987-05-19 | 1987-11-18 | $7700.00 | Window Closed / Lapsed |