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US3919690A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital receiving apparatus

Assignee: General Dynamics Government Systems Corp
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Filing: 1975-02-27
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Granted: 1975-11-11
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Expires: 1995-02-27
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Abstract

Abstract A digital receiver for receiving 8-bit permutable address code words. Before receiving each address code word the receiver must be activated by receiving five consecutive identical words of an interdigit signal of alternating 1''s and 0''s. The receiver must then receive the same address code word five times in succession in order to accept it. The incoming signals are applied to an 8bit input shift register. Each bit is counted by a counter, but if the incoming bit and the bit in the eighth stage of the shift register are different, the counter is cleared. When the count in the counter indicates five identical 8-bit words have been received in succession and an interdigit detector detects that the word is an interdigit word, a state flip-flop is set. If the state flip-flop was previously in the reset condition, the interdigit word is loaded into an output shift register for reading out on an output line. The next time the counter reaches a count indicating that five identical 8-bit words have been received in succession, if the interdigit detector indicates that the word in the input shift register is not an interdigit word, the state flip-flop is reset and the contents of the input shift register are loaded into the output shift register. The receiver accepts an address code word and loads it into the output shift register only if it is received five times in succession after a sequence of five interdigit words have set the state flip-flop. In addition, the receiver accepts an interdigit code word and loads it into the output shift register only if it is received five times in succession after a sequence of five address code words have reset the state flip-flop.

Inventors

  • 👤 Robert G Field
  • 👤 Donn A Wahl

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 12:59
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/08

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 278 words
Digital receiving apparatus comprising input storage means for receiving and storing digital words; detection means for detecting the presence or absence of particular digital code words stored in said input storage means; counting means for determining when said input storage means has received a predetermined number of identical digital words in succession; control means coupled to said detection means and to said counting means and having two operating states; said control means being operable in a first operating state in response to a determination that said predetermined number of identical particular digital code words have been received by said input storage means; and being operable in the second operating state in response to a determination that said predetermined number of identical digital words other than said particular digital code words have been received by said input storage means; said control means being operable to produce an indication in response to a determination that said predetermined number of identical particular digital code words have been received by said input storage means when in said second operating state, and being operable to produce an indication in response to a determination that said predetermined number of identical digital words other than said particular digital code words have been received by said input storage means when in said first operating state; output storage means coupled to said input storage means and to said control means for receiving and storing a digital word stored in said input storage means in response to an indication from said control means; and readout means for applying a readout signal to said output storage means to read out the digital word stored in said output storage means.
Claim 2
Dependent Claim 278 words
Digital receiving apparatus comprising input storage means for receiving and storing digital words; detection means for detecting the presence or absence of particular digital code words stored in said input storage means; counting means for determining when said input storage means has received a predetermined number of identical digital words in succession; control means coupled to said detection means and to said counting means and having two operating states; said control means being operable in a first operating state in response to a determination that said predetermined number of identical particular digital code words have been received by said input storage means; and being operable in the second operating state in response to a determination that said predetermined number of identical digital words other than said particular digital code words have been received by said input storage means; said control means being operable to produce an indication in response to a determination that said predetermined number of identical particular digital code words have been received by said input storage means when in said second operating state, and being operable to produce an indication in response to a determination that said predetermined number of identical digital words other than said particular digital code words have been received by said input storage means when in said first operating state; output storage means coupled to said input storage means and to said control means for receiving and storing a digital word stored in said input storage means in response to an indication from said control means; and readout means for applying a readout signal to said output storage means to read out the digital word stored in said output storage means.
Claim 3
Dependent Claim 159 words
Digital receiving apparatus in accordance with claim 1 wherein said detection means is operable to produce a first output signal during the presence of said particular digital code words stored in said input storage means and is operable to produce a second output signal during the presence of a digital word other than said particular digital code words stored in said input storage means; said counting means is operable to produce an output signal in response to determining that said input storage means has received said predetermined number of identical digital words in succession; and said control means is caused to operate in said first operating state in response to receiving an output signal from said counting means while receiving a first output signal from said detection means and is caused to operate in said second operating state in response to receiving an output signal from said counting means while receiving a second output signal from said detection means.
Claim 4
Dependent Claim 252 words
Digital receiving apparatus in accordance with claim 2 wherein said control means includes bistable means coupled to said detection means and having first and second operating conditions; said bistable means being caused to operate in the first operating condition in response to termination of a control pulse applied thereto while receiving said first output signal from said detection means and being caused to operate in the second operating condition in response to termination of a control pulse applied thereto while receiving said second output signal from said detection means; said bistable means producing a first output signal when in said first operating condition and producing a second output signal when in said second operating condition; control input means coupled to said bistable means and to said counting means; said control input means being operable to produce a control pulse to said bistable means in response to receiving an output signal from said counting means; and control output means coupled to said control input means, said biStable means, and said detection means; said control output means being operable to produce said indication in response to a first output signal from said detection means while said bistable means is producing said second output signal and while said control input means is producing a control pulse, and being operable to produce said indication in response to a second output signal from said detection means while said bistable means is producing said first output signal and while said control input means is producing a control pulse.
Claim 5
Dependent Claim 146 words
Digital receiving apparatus in accordance with claim 3 wherein each digital word consists of N bits; said input storage means includes shift register means having N stages; said counting means includes count accumulating means operable to record a count for each bit received by said shift register means and to produce an output signal when the accumulated count reaches a preset value indicating said predetermined number of digital words have been received; and count clearing means coupled to the input to said shift register means, to the last of said N stages of the shift register means, and to said count accumulating means; said count clearing means being operable to clear said count accumulating means of the accumulated count when the bit being applied to the input is different from the bit in the last stage indicating that two digital words in succession are not identical.
Claim 6
Dependent Claim 85 words
Digital receiving apparatus in accordance with claim 4 wherein said control input means includes a second bistable means coupled to said counting means; said second bistable means having first and second operating conditions and producing said control pulse while in the first operating condition; said second bistable means being triggered from the second to the first operating condition in response to an indication from the counting means and being triggered from the first to the second operating condition thereby terminating a control pulse being produced.
Claim 7
Dependent Claim 90 words
Digital receiving apparatus in accordance with claim 5 wherein the bits of the said digital words are received in series; and including means for applying a clock pulse to said second bistable means in synchronism with each bit received by said input storage means; and said second bistable means being triggered from the second to the first operating condition by a clock pulse applied thereto while receiving an output signal from the counting means, and being triggered from the first to the second operating condition by the next clock pulse.

References Cited (Backward Citations)

US3252139A Cited
US3772649A Cited
US3737577A Cited
US3760371A Cited
US3863215A Cited
US3842399A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-11-10 1979-05-12 1979-11-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-11-10 1983-05-12 1983-11-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-11-10 1987-05-12 1987-11-11 $7700.00 Window Closed / Lapsed

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