Method of fabricating uniphase charge coupled devices

Claim 1

A METHOD OF FORMING A UNIPHASE CHARGE COUPLED DEVICE COMPRISING THE STEPS OF: FORMING ON THE SEMICONDUCTOR STORAGE MEDIUM A FIRST PATTERN OF INSULATING MATERIAL COMPEISING REGIONS OF SUFFICIENTLY THICK INSULATING MATERIAL TO ACT AS BARRIERS TO IMPLANTATION OF IONS IN THE SEMICONDUCTOR, EACH OF SAID REGION HAVING A WIDTH W WHERE W IS ONE-HALF THE CENT REGIONS BY THE DISTANCE W WHERE W IS ONE-HALF THE DESIRED CELL LINGTH, FORMING OVER SAID INSULATING PATTERN A MASK PATTERN IN THE FORM OF DISCRETE REGIONS OF WIDTH W SUCH THAT EACH MASK REGION OVERLIES A PORTION OF A BARRIER REGION AND A PORTION OF THE SPACE BETWEEN BARRIER REGIONS, EXPOSING SAID STRUCTURE TO AN ION BEAM SO AS TO FORM IMPLANTED SURFACE CHARGE REGIONS IN SAID SEMICONDUCTOR ONLY IN THE AREAS NOT COVERED BY A MASK REGION OR BARRIER REGION, FORMING INSULATING MATERIAL OVER THE AREA OF THE SEMICONDUCTOR INCLUDING SAID SURFACE REGIONS SO AS TO FORM A SECOND INSULATING PATTERN COMPRISING ALTERNATING RELATIVELY THICK AND THIN REGIONS WHERE EACH REGION HAS A WIDTH W AND THE THICK REGIONS COVER AT LEAST A PORTION OF THE SEMICONDUCTOR NOT COVERED BY THE PREVIOUS BARRIER REGIONS OF THE FIRST INSULATING PATTERN, AND FORMING A LAYER OF CONDUCTING MATERIAL OVER SAID INSULATING PATTERN.

Claim 2

A METHOD OF FORMING A UNIPHASE CHARGE COUPLED DEVICE COMPRISING THE STEPS OF: FORMING ON THE SEMICONDUCTOR STORAGE MEDIUM A FIRST PATTERN OF INSULATING MATERIAL COMPEISING REGIONS OF SUFFICIENTLY THICK INSULATING MATERIAL TO ACT AS BARRIERS TO IMPLANTATION OF IONS IN THE SEMICONDUCTOR, EACH OF SAID REGION HAVING A WIDTH W WHERE W IS ONE-HALF THE CENT REGIONS BY THE DISTANCE W WHERE W IS ONE-HALF THE DESIRED CELL LINGTH, FORMING OVER SAID INSULATING PATTERN A MASK PATTERN IN THE FORM OF DISCRETE REGIONS OF WIDTH W SUCH THAT EACH MASK REGION OVERLIES A PORTION OF A BARRIER REGION AND A PORTION OF THE SPACE BETWEEN BARRIER REGIONS, EXPOSING SAID STRUCTURE TO AN ION BEAM SO AS TO FORM IMPLANTED SURFACE CHARGE REGIONS IN SAID SEMICONDUCTOR ONLY IN THE AREAS NOT COVERED BY A MASK REGION OR BARRIER REGION, FORMING INSULATING MATERIAL OVER THE AREA OF THE SEMICONDUCTOR INCLUDING SAID SURFACE REGIONS SO AS TO FORM A SECOND INSULATING PATTERN COMPRISING ALTERNATING RELATIVELY THICK AND THIN REGIONS WHERE EACH REGION HAS A WIDTH W AND THE THICK REGIONS COVER AT LEAST A PORTION OF THE SEMICONDUCTOR NOT COVERED BY THE PREVIOUS BARRIER REGIONS OF THE FIRST INSULATING PATTERN, AND FORMING A LAYER OF CONDUCTING MATERIAL OVER SAID INSULATING PATTERN.

Claim 11

A method of forming a uniphase charge coupled device comprising the steps of: forming on a semiconductor medium of a first conducting type a first pattern of insulating material comprising a first insulating layer of uniform thickness and a second insulating layer formed thereon comprising silicon nitride in the form of discrete regions of width W and spacing between adjacent regions of a distance W, where W is one-half the desired cell length; exposing said structure to a first ion beam of conductivity type opposite to said semiconductor so as to form a first set of surface charge regions in said semiconductor in the areas not covered by said silicon nitride regions; forming over said insulating pattern a first mask pattern in the form of discrete regions of width W separated from adjacent regions by a distance W such that each mask region overlies a portion of a silicon nitride region and a portion of said first insulating layer; exposing the resulting structure to a second ion beam of conductivity type opposite to said semiconductor so as to form a second set of surface charge regions in said semiconductor in the areas not covered by a mask region or silicon nitride region, each of the second set of charge regions thereby being adjacent to one of said first set of charge regions and having a charge concentration which is the sum of the contributions of said first and second ion beams; removing said mask regions, forming additional insulating material on the portions of the first insulating layer which are not covered by the silicon nitride regions and removing said silicon nitride regions so as to form a second insulating pattern comprising alternating relatively thick and thin regions where each region has a width W and the thick regions cover the portions of the semiconductor including said first and second set of charge region; forming over said second insulating pattern a second mask pattern in the form of discrete regions of width W separated from adjacent regions by a distance W such that each mask region overlies a portion of a thick region and a portion of a thin region of said second insulating pattern; exposing the resulting structure to a third ion beam of conductivity type opposite to the semiconductor so as to form a third set of surface charge regions in the areas of the semiconductor not covered by a mask region or thick insulator region, each region of said third set being adjacent to a region of said first set and having a charge concentration which is greater than that of the regions of said first set; removing said second mask pattern; and forming a layer of conducting material over said second insulating pattern.

Claim 12

A method of forming a uniphase charge coupled device comprising the steps of: forming on a semiconductor medium of a first conducting type a first pattern of insulating material comprising a first insulating layer of uniform thickness and a second insulating layer formed thereon comprising silicon nitride in the form of discrete regions of width W and spacing between adjacent regions of a distance W, where W is one-half the desired cell length; exposing said structure to a first ion beam of conductivity type opposite to said semiconductor so as to form a first set of surface charge regions in said semiconductor in the areas not covered by said silicon nitride regions; forming over said insulating pattern a first mask pattern in the form of discrete regions of width W separated from adjacent regions by a distance W such that each mask region overlies a portion of a silicon nitride region and a portion of said first insulating layer; exposing the resulting structure to a second ion beam of conductivity type opposite to said semiconductor so as to form a second set of surface charge regions in said semiconductor in the areas not covered by a mask region or silicon nitride region, each of the second set of charge regions thereby being adjacent to one of said first set of charge regions and having a charge concentration which is the sum of the contributions of said first and second ion beams; removing said mask regions, forming additional insulating material on the portions of the first insulating layer which are not covered by the silicon nitride regions and removing said silicon nitride regions so as to form a second insulating pattern comprising alternating relatively thick and thin regions where each region has a width W and the thick regions cover the portions of the semiconductor including said first and second set of charge region; forming over said second insulating pattern a second mask pattern in the form of discrete regions of width W separated from adjacent regions by a distance W such that each mask region overlies a portion of a thick region and a portion of a thin region of said second insulating pattern; exposing the resulting structure to a third ion beam of conductivity type opposite to the semiconductor so as to form a third set of surface charge regions in the areas of the semiconductor not covered by a mask region or thick insulator region, each region of said third set being adjacent to a region of said first set and having a charge concentration which is greater than that of the regions of said first set; removing said second mask pattern; and forming a layer of conducting material over said second insulating pattern.

Claim 13

A method of forming a uniphase charge-coupled device comprising the steps of: forming on a semiconductor medium of a first conductivity type a first insulating layer of uniform thickness; forming on said insulating layer a first mask pattern in the form of discrete regions of width W and spacing between adjacent regions of A distance W, where W is one-half the desired cell length; exposing the resulting structure to a first ion beam of impurities of the same conductivity type as the semiconductor so as to form a first set of surface charge regions of greater concentration than said semiconductor in the areas not covered by said mask regions; removing said mask pattern and forming on said semiconductor a first insulating pattern comprising discrete regions of silicon nitride of width W and separated from adjacent regions by a distance W, each of said regions placed so as to overlie a portion of a first surface charge region and a portion of said semiconductor not including said charge region; etching the portions of semiconductor not covered by said silicon nitride regions to a sufficient depth in order to remove all of the surface charge regions located in these portions; forming on the resulting structure a second mask pattern in the form of discrete regions of width W and spacing between adjacent regions of W such that each mask region overlies a portion of a silicon nitride region and a portion of an adjacent etched surface of semiconductor; exposing the resulting structure to a second ion beam of impurities of the same conductivity type as the semiconductor so as to form a second set of surface charge regions with a higher charge concentration than said semiconductor in the areas of semiconductor not covered by either a mask region or silicon nitride region; removing said mask regions and forming insulating material only on the etched surfaces of semiconductor so as to form a second insulating pattern of relatively thick and thin regions, said thick regions covering portions of semiconductor including one of said second set of surface charge regions and the thin regions covering portions of semiconductor including one of said first set of charge regions; and forming a layer of conducting material over said second insulating pattern.

Claim 14

A method of forming a uniphase charge-coupled device comprising the steps of: forming on a semiconductor medium of a first conductivity type a first insulating layer of uniform thickness; forming on said insulating layer a first mask pattern in the form of discrete regions of width W and spacing between adjacent regions of A distance W, where W is one-half the desired cell length; exposing the resulting structure to a first ion beam of impurities of the same conductivity type as the semiconductor so as to form a first set of surface charge regions of greater concentration than said semiconductor in the areas not covered by said mask regions; removing said mask pattern and forming on said semiconductor a first insulating pattern comprising discrete regions of silicon nitride of width W and separated from adjacent regions by a distance W, each of said regions placed so as to overlie a portion of a first surface charge region and a portion of said semiconductor not including said charge region; etching the portions of semiconductor not covered by said silicon nitride regions to a sufficient depth in order to remove all of the surface charge regions located in these portions; forming on the resulting structure a second mask pattern in the form of discrete regions of width W and spacing between adjacent regions of W such that each mask region overlies a portion of a silicon nitride region and a portion of an adjacent etched surface of semiconductor; exposing the resulting structure to a second ion beam of impurities of the same conductivity type as the semiconductor so as to form a second set of surface charge regions with a higher charge concentration than said semiconductor in the areas of semiconductor not covered by either a mask region or silicon nitride region; removing said mask regions and forming insulating material only on the etched surfaces of semiconductor so as to form a second insulating pattern of relatively thick and thin regions, said thick regions covering portions of semiconductor including one of said second set of surface charge regions and the thin regions covering portions of semiconductor including one of said first set of charge regions; and forming a layer of conducting material over said second insulating pattern.

Claim 16

A method of forming a uniphase charge coupled device comprising the steps of: forming on a semiconductor medium of a first conductivity type a first insulating pattern comprising alternating relatively thick and thin regions of insulator, the thick portions being sufficient to act as barriers to implantation of impurities, where each region has a width W where W is one-half the desired cell length; forming over said insulating pattern is a first mask pattern comprising discrete regions of silicon nitride of width W and spacing between the regions of W such that each mask region overlies a portion of a thick insulating region and a portion of an adjacent thin insulating region; exposing the resulting structure to a first ion beam of impurities of the same conductivity type as the semiconductor so as to form a first set of surface charge regions in the areas of the semiconductor not covered by either a mask region or a thick insulating region; removing the portions of the insulator not covered by said silicon nitride mask regions; exposing the resulting structure to a second ion beam of impurities of a conductivity type opposite to the semiconductor so as to form in the areas not covered by silicon nitride regions a second set of surface charge regions of a conductivity type opposite to the semiconductor and adjacent thereto a third set of surface charge regions of opposite conductivity type which charge concentration is the sum of the contributions from said first and second beam of impurities; forming insulating material on the portions of said semiconductor not covered by said silicon nitride regions so as to form a second insulating pattern wherein the thickest portions of the insulator overlie the portions of semiconductor including said adjacent surface charge regions; removing said silicon nitride regions and forming over said second insulator pattern a layer of conducting material.

Claim 17

A method of forming a uniphase charge coupled device comprising the steps of: forming on a semiconductor medium of a first conductivity type a first insulating pattern comprising alternating relatively thick and thin regions of insulator, the thick portions being sufficient to act as barriers to implantation of impurities, where each region has a width W where W is one-half the desired cell length; forming over said insulating pattern is a first mask pattern comprising discrete regions of silicon nitride of width W and spacing between the regions of W such that each mask region overlies a portion of a thick insulating region and a portion of an adjacent thin insulating region; exposing the resulting structure to a first ion beam of impurities of the same conductivity type as the semiconductor so as to form a first set of surface charge regions in the areas of the semiconductor not covered by either a mask region or a thick insulating region; removing the portions of the insulator not covered by said silicon nitride mask regions; exposing the resulting structure to a second ion beam of impurities of a conductivity type opposite to the semiconductor so as to form in the areas not covered by silicon nitride regions a second set of surface charge regions of a conductivity type opposite to the semiconductor and adjacent thereto a third set of surface charge regions of opposite conductivity type which charge concentration is the sum of the contributions from said first and second beam of impurities; forming insulating material on the portions of said semiconductor not covered by said silicon nitride regions so as to form a second insulating pattern wherein the thickest portions of the insulator overlie the portions of semiconductor including said adjacent surface charge regions; removing said silicon nitride regions and forming over said second insulator pattern a layer of conducting material.