US3793088A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compatible pnp and npn devices in an integrated circuit
Assignee: AT&T Inc
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Filing: 1972-11-15
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Granted: 1974-02-19
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Expires: 1992-11-15
Abstract
Abstract Compatible, matched, complementary semiconductor devices are fabricated in a common semiconductor body using a combination of oxide-masked diffusion, epitaxial deposition and photoresistmasked, ion implantation. A pair of zones of opposite conductivity type are formed in a high resistivity substrate by sequential oxide-masked diffusion, ion implantation, epitaxial deposition and subsequent out-diffusion. Using a series of photoresist masks, successive ion-implantation steps of P- and Ntype impurities produce the base and emitter zones of the complementary transistors as well as zones of enhanced conductivity for connecting to the collector zone.
Inventors
- 👤 W Eckton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:39
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/0119; H10D84/0121; H10D84/02; H10D84/03; H10D84/038; H10D84/60; H10D84/67; H10D84/673; H10P; H10P30/00; H10P30/20; H10P30/22; Y; Y10; Y10S; Y10S148/00; Y10S148/035; Y10S148/037; Y10S148/085; Y10S148/098; Y10S148/106; Y10S148/114; Y10S148/145; Y10S148/151
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
32 words
The method in accordance with claim 1 including the additional step of forming ohmic connections to each of said projected first and second zones and first, second, third and fourth ion-implanted zones.
Claim 2
Dependent Claim
23 words
The method in accordance with claim 1 in which step (b) comprises successive masked diffusion steps and step (c) comprises successive ion-implantation steps.
Claim 3
Dependent Claim
19 words
The method in accordance with claim 1 in which step (e) occurs during the deposition process of step (d).
Claim 4
Dependent Claim
33 words
The method in accordance with claim 1 in which an annealing heat treatment occurs following step (f) and during the formation of a dielectric film on a surface portion of the semiconductor body.
References Cited (Backward Citations)
US3617824A
Cited
US3748545A
Cited
US3648130A
Cited
US3723199A
Cited
US3747203A
Cited
US3729811A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-02-18 | 1977-08-20 | 1978-02-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-02-18 | 1981-08-20 | 1982-02-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-02-18 | 1985-08-20 | 1986-02-19 | $7700.00 | Window Closed / Lapsed |