Patent US3916390A successfully refreshed from Google Patents.
US3916390A
Expired / Lapsed
US
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Dynamic memory with non-volatile back-up mode
Assignee: International Business Machines Corp
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Filing: 1974-12-31
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Granted: 1975-10-28
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Expires: 1994-12-31
Abstract
Abstract A random access dynamic read-write FET memory system is provided with non-volatile storage of data in the event of a system power failure. The memory system includes an array of single device memory cells in which information is dynamically stored on a variable threshold non-volatile capacitor. A memory protect circuit detects system power supply failures and causes data volatively stored in the memory array to be non-volatively stored directly in the storage capacitor dielectric of each memory cell. Upon restoration of power, the non-volatively stored data is read from the array into a small auxiliary memory and the variable threshold storage capacitors are restored to their original state. Data is then returned to the memory cells in a dynamic mode.
Inventors
- 👤 Joseph Juifu Chang
- 👤 Richard Arthur Kenyon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 12:18
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; G11C14/00; G11C16/00; G11C16/02; G11C16/04; G11C16/0466; H; H10; H10B; H10B12/00; H10D; H10D84/00; H10D84/80; H10D84/811; H10D84/813
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
167 words
A memory system comprising: a fixed threshold field effect charge transfer means having a control electrode for controlling the conductivity of a semiconductor channel region; a variable threshold capacitive storage means, having stable high and low threshold states, for storing information representative of a first and second logical states, said first logical state corresponding to the presence of a charge and second logical state corresponding to the absence of a charge, said storage means being serially connected between said channel region and a source of potential; dynamic memory control circuit means for applying signals to said control electrode to dynamically store and retrieve information when said storage means is in said low threshold state; and non-volatile memory control circuit means for changing the potential of said source of potential to a level sufficient to change the threshold state of said storage means from said low state to said high state when a charge is dynamically stored on said storage means in order to non-volatively store said information.
Claim 2
Dependent Claim
167 words
A memory system comprising: a fixed threshold field effect charge transfer means having a control electrode for controlling the conductivity of a semiconductor channel region; a variable threshold capacitive storage means, having stable high and low threshold states, for storing information representative of a first and second logical states, said first logical state corresponding to the presence of a charge and second logical state corresponding to the absence of a charge, said storage means being serially connected between said channel region and a source of potential; dynamic memory control circuit means for applying signals to said control electrode to dynamically store and retrieve information when said storage means is in said low threshold state; and non-volatile memory control circuit means for changing the potential of said source of potential to a level sufficient to change the threshold state of said storage means from said low state to said high state when a charge is dynamically stored on said storage means in order to non-volatively store said information.
Claim 3
Dependent Claim
26 words
The memory system of claim 1 further including means for sensing the logical state of said storage means in both said high and low threshold states.
Claim 4
Dependent Claim
46 words
The memory system of claim 1 wherein said non-volatile memory control circuit means further includes means responsive to the interruption of power supplied to said memory system for initiating a change in the potential of said source of potential in the event of a power interruption.
Claim 5
Dependent Claim
27 words
The memory system of claim 1 further including means for changing the threshold state of said storage means from said high threshold to said low threshold state.
Claim 6
Dependent Claim
158 words
A data processing system comprising: a memory array including a plurality of random access memory cells, each memory cell comprising a charge transfer means responsive to signals on a word line to couple a bit line to a variable threshold storage capacitor having stable high and low threshold states, said storage capacitor having an electrode connected to a controllable source of potential; and memory cell access means for storing information in said storage capacitors in a dynamic mode of operation when said storage capacitors are in said low threshold state; and storage protection means for controlling said source of potential to provide a fixed bias potential when information is stored in said dynamic mode, and to provide a non-volatile high threshold write potential to said electrode in response to an interruption in power to said data processing system to cause interruption in said memory array to be stored in said storage capacitors in a non-volatile mode of operation.
Claim 7
Dependent Claim
158 words
A data processing system comprising: a memory array including a plurality of random access memory cells, each memory cell comprising a charge transfer means responsive to signals on a word line to couple a bit line to a variable threshold storage capacitor having stable high and low threshold states, said storage capacitor having an electrode connected to a controllable source of potential; and memory cell access means for storing information in said storage capacitors in a dynamic mode of operation when said storage capacitors are in said low threshold state; and storage protection means for controlling said source of potential to provide a fixed bias potential when information is stored in said dynamic mode, and to provide a non-volatile high threshold write potential to said electrode in response to an interruption in power to said data processing system to cause interruption in said memory array to be stored in said storage capacitors in a non-volatile mode of operation.
Claim 8
Dependent Claim
32 words
The data processing system of claim 5 wherein said storage protection means further includes means for converting said memory array from said non-volatile mode of operation to said dynamic mode of operation.
Claim 9
Dependent Claim
52 words
The data processing system of claim 5 further including: an auxiliary memory; means for transferring information non-volatively stored in said memory array to said auxiliary memory and wherein said storage protection means further provides a non-volatile erase potential to said electrode to restore said variable storage capacitors to said low threshold state.
Claim 10
Dependent Claim
151 words
In a data processing system, the method of preventing the destruction of information volatively stored as a potential across the dielectric of a plurality of capacitors of a memory system, in the event of an interruption of power in the power supply of said data processing system, comprising the steps of: detecting an interruption of power in the power supply of the data processing system; sustaining power to said memory system for a predetermined period of time; transferring said volatively stored information on said capacitors directly to the dielectric of said capacitors to be stored in a non-volatile form; detecting the resumption of power in said power supply of said data processing system; reading said non-volatively stored information in said memory system to an auxiliary memory; erasing the non-volatively stored data from said memory system; and returning said information from said auxiliary memory to said memory system to be volatively stored.
Claim 11
Dependent Claim
151 words
In a data processing system, the method of preventing the destruction of information volatively stored as a potential across the dielectric of a plurality of capacitors of a memory system, in the event of an interruption of power in the power supply of said data processing system, comprising the steps of: detecting an interruption of power in the power supply of the data processing system; sustaining power to said memory system for a predetermined period of time; transferring said volatively stored information on said capacitors directly to the dielectric of said capacitors to be stored in a non-volatile form; detecting the resumption of power in said power supply of said data processing system; reading said non-volatively stored information in said memory system to an auxiliary memory; erasing the non-volatively stored data from said memory system; and returning said information from said auxiliary memory to said memory system to be volatively stored.
Claim 12
Dependent Claim
101 words
A capacitive storage memory system for a data processing system comprising: an array of addressable memory cells arranged in columns and rows, each of said memory cells comprising a fixed threshold field effect device responsive to an addressing signal for transferring charge through a channel region between a storage node and a bit line, each memoRy cell further comprising a variable threshold capacitive storage means serially connected between said storage node and a source of potential; and non-volatile write means for selectively altering the threshold of said variable threshold capacitive storage means in response to a charge on said storage node.
Claim 13
Dependent Claim
101 words
A capacitive storage memory system for a data processing system comprising: an array of addressable memory cells arranged in columns and rows, each of said memory cells comprising a fixed threshold field effect device responsive to an addressing signal for transferring charge through a channel region between a storage node and a bit line, each memoRy cell further comprising a variable threshold capacitive storage means serially connected between said storage node and a source of potential; and non-volatile write means for selectively altering the threshold of said variable threshold capacitive storage means in response to a charge on said storage node.
Claim 14
Dependent Claim
28 words
The capacitive storage memory system of claim 9, wherein said non-volatile write means is responsive to an interruption in the source of power to said data processing system.
Claim 15
Dependent Claim
19 words
The capacitive storage memory system of claim 10 wherein said variable threshold capacitive storage means comprises a metal-nitride-oxide-semiconductor structure.
References Cited (Backward Citations)
US3771148A
Cited
US3774177A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-10-27 | 1979-04-28 | 1979-10-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-10-27 | 1983-04-28 | 1983-10-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-10-27 | 1987-04-28 | 1987-10-28 | $7700.00 | Window Closed / Lapsed |