Patent US3916331A successfully refreshed from Google Patents.
US3916331A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low power, high impedance, low bias input configuration
Assignee: Texas Instruments Inc
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Filing: 1973-12-26
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Granted: 1975-10-28
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Expires: 1993-12-26
Abstract
Abstract An improved differential amplifier which includes a low power, high impedance, low current input configuration and a bias current selection circuit. In the input configuration two bipolar transistors are arranged in series, with the input node provided into the base of one of these transistors. A Wilson current source is connected between the base of the input transistor and the transistor in series therewith to sense the base current of the series transistor and provides an equal current to the base of the input transistor thereby resulting in an input bias current at the input node which is essentially equal to zero. The bias current selection circuit senses a large differential input and increases bias current in response thereto to permit fast slewing.
Inventors
- 👤 Stephen Robert Schenck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:31
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/56; H03F3/00; H03F3/30; H03F3/3066
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
179 words
An improved differential amplifier comprising: a. first and second input circuits each comprising: i. a first transistor of one conductivity type having its base connected to the circuit input; ii. a second transistor of the same type having its emitter coupled to the electrode of said first transistors; and iii. circuit means having its input coupled to the base of said second transistor and its output coupled to the base of said first transistor for supplying a bias current to said first transistor substantially equal to the base current of said second transistor; b. an input differential stage having its two inputs coupled respectively to the outputs of said first and second input circuits; c. an output stage coupled to said input differential stage; d. a bias current circuit coupled to each of said input circuits, input differential stage and output stage to establish bias currents therein; and e. means to sense a large differential input voltage and means in said bias current circuit responsive thereto to cause an increase in the bias current in each of said stages.
Claim 2
Dependent Claim
179 words
An improved differential amplifier comprising: a. first and second input circuits each comprising: i. a first transistor of one conductivity type having its base connected to the circuit input; ii. a second transistor of the same type having its emitter coupled to the electrode of said first transistors; and iii. circuit means having its input coupled to the base of said second transistor and its output coupled to the base of said first transistor for supplying a bias current to said first transistor substantially equal to the base current of said second transistor; b. an input differential stage having its two inputs coupled respectively to the outputs of said first and second input circuits; c. an output stage coupled to said input differential stage; d. a bias current circuit coupled to each of said input circuits, input differential stage and output stage to establish bias currents therein; and e. means to sense a large differential input voltage and means in said bias current circuit responsive thereto to cause an increase in the bias current in each of said stages.
Claim 3
Dependent Claim
125 words
The invention according to claim 1 wherein said means to sense comprise: a. first and second active loads driven in response to the current in said first and second input circuits; b. first and second current supplies coupled to said first and second current sources, driven by said bias control circuit and designed so as to have a fixed maximum current output which is less than the maximum current which may flow in said first and second active loads; c. first and second means to sense a condition where the current from said current supplies is greater than the current being demanded by its associated current source and to provide an output indicative thereof, said means to increase bias current being responsive to said output.
Claim 4
Dependent Claim
64 words
The invention according to claim 1 wherein said bias current circuit includes a first resistor having a fixed voltage applied thereto with the current therethrough establishing the bias current and said means to increase comprise: a) a second resistor; and b) means responsive to said output to cause said resistor to establish a current which is added to said current through said first resistor.
Claim 5
Dependent Claim
70 words
The invention according to claim 3 wherein said first and second means to sense comprise first and second diodes coupled to the point of coupling between said first and second active loads and said first and second current supplies, said diodes providing said output and said means responsive to said output comprises a transistor having its base coupled to said diodes and said second resistor in its emitter collector path.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-10-27 | 1979-04-28 | 1979-10-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-10-27 | 1983-04-28 | 1983-10-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-10-27 | 1987-04-28 | 1987-10-28 | $7700.00 | Window Closed / Lapsed |