Patent US3909526A successfully refreshed from Google Patents.
US3909526A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Square wave oscillator for a data terminal
Assignee: MI 2 74245 76919720420013 781
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Filing: 1973-07-16
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Granted: 1975-09-30
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Expires: 1993-07-16
Abstract
Abstract A square wave oscillator for use with a data terminal, a data modulator and a buffer, for generating a signal which restrains the transmission of incoming data when the buffer is full. The square wave oscillator comprises a high gain differential comparator with a resistive feedback network connected to its non-inverting input and a series pair of resistors connected between its output and its inverting input. A capacitance is connected between the common node of the series pair and a dc supply. The oscillator is inhibited by a dc signal applied through a diode to the comparator''s inverting input when the buffer is not full but is effectively freed to oscillate when the buffer is full to apply a modulating restraint signal input to the modem''s modulator.
Inventors
- 👤 Richard D Fretwell
- 👤 James W Azbell
- 👤 Edwin E Mason
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:22
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/05; G; G06; G06F; G06F3/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
223 words
A data terminal, comprising a data modulator and a buffer having a full signalling means, further comprising a restraint signal generator including a awave oscillator comprising: a. a high gain differential comparator circuit having an inverting input, a non-inverting input and an output; b. a first voltage divider feedback network connected to said output, to a common ground, and to one of said inputs for applying a proportion of the signal at said output to said one input; and c. a second feedback network including a series connected pair of resistances connected between said output and the other of said inputs, and a capacitance connected between the common node of said resistance pair and an AC ground; said data modulator connected to the output of said generator, and said buffer connected to the input of said generator; said output of said oscillator connected to said modulator for modulating the signal at said output; and including electronic switching means effectively connected I to said full signalling means for control thereby II to one of said comparator circuit inputs and III to a fixed dc voltage for applying a selected dc voltage level to one of said inputs to inhibit the oscillator when said buffer is not full and for effectively disconnecting said voltage level when said buffer is full freeing the oscillator to oscillate.
Claim 2
Dependent Claim
223 words
A data terminal, comprising a data modulator and a buffer having a full signalling means, further comprising a restraint signal generator including a awave oscillator comprising: a. a high gain differential comparator circuit having an inverting input, a non-inverting input and an output; b. a first voltage divider feedback network connected to said output, to a common ground, and to one of said inputs for applying a proportion of the signal at said output to said one input; and c. a second feedback network including a series connected pair of resistances connected between said output and the other of said inputs, and a capacitance connected between the common node of said resistance pair and an AC ground; said data modulator connected to the output of said generator, and said buffer connected to the input of said generator; said output of said oscillator connected to said modulator for modulating the signal at said output; and including electronic switching means effectively connected I to said full signalling means for control thereby II to one of said comparator circuit inputs and III to a fixed dc voltage for applying a selected dc voltage level to one of said inputs to inhibit the oscillator when said buffer is not full and for effectively disconnecting said voltage level when said buffer is full freeing the oscillator to oscillate.
Claim 3
Dependent Claim
23 words
A voltage divider according to claim 1 wherein said first feedback network in said square wave oscillator is connected to said non-inverting input.
Claim 4
Dependent Claim
14 words
A generator according to claim 2 wherein said electronic switching means comprises a diode.
Claim 5
Dependent Claim
27 words
A generator according to claim wherein the input of said comparator circuit to which said diode and said second feedback network are connected is said inverting input.
Claim 6
Dependent Claim
19 words
A generator according to claim 4 wherein said capacitor is connected through a dc source to said common ground.
Claim 7
Dependent Claim
129 words
A terminal according to claim 4 wherein said electronic switch further comprises: a. second high gain differential comparator having its output connected to said switching means, its non-inverting input effectively connected to said signalling means and its inverting input connected to a restraint inhibiting logic circuit of said modem; b. at least three series connected voltage dividing resistances connected between a positive dc source and a negative dc source, having the non-inverting input of said second comparator connected to one node of said series dividing resistances; and c. a second switching means connected between another node of said series voltage diviDing resistances and a dc level intermediate said source, said second switching means comprises a pair of contacts which are connected by said buffer when the buffer is full.
Claim 8
Dependent Claim
24 words
A generator according to claim 4 wherein a variable resistance is connected between said common node and said output for controlling the oscillator frequency.
Claim 9
Dependent Claim
36 words
A generator according to claim 4 wherein said first feedback network comprises a pair of substantially equal resistances connected between said output and said common ground and said non-inverting input is connected to their common node.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-29 | 1979-03-31 | 1979-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-29 | 1983-03-31 | 1983-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-29 | 1987-03-31 | 1987-09-30 | $7700.00 | Window Closed / Lapsed |