Restraint signal generator and oscillator

Claim 1

A restraint signal generator for use with a data terminal including a data modulator and a buffer, the buffer having a ''''full'''' signalling means, the generator comprising: a. a square oscillator including a high gain differential comparator cirucit having an inverting input, a non-inverting, and an output, said output connected to said modulator for modulating the signal at said output; b. electronic switching means effectively connected (I) to said ''''full'''' signalling means for control thereby (II) to one of said comparator circuit inputs (III) to a fixed dc voltage for applying a selected dc voltage level to one of said inputs to inhibit said oscillator when said buffer is not full and for effectively disconnecting said voltage level when said buffer is full freeing said oscillator to oscillate; c. a second high gain differential comparator having its output connected to said switching means, its non-inverting input effectively connected to said signalling means, and its inverting input connected to a restraint inhibiting logic circuit of said modem; d. at least three series connected voltage dividing resistances connected between a positive dc source and a negative dc source, having the non-inverting input of said second comparator connected to one node of said series dividing resistances; and e. a second switching means connected between another node of said series voltage dividing resistances and a dc level intermediate said sources, said second switching means comprising a pair of contacts which are closed by said buffer when the buffer is full.