US3908169A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency shift demodulator having a variable clock rate
Assignee: AT&T Inc
•
Filing: 1974-03-22
•
Granted: 1975-09-23
•
Expires: 1994-03-22
Abstract
Abstract Frequency-shift data signals, in particular those whose maximum data transmission rate is comparable to the carrier frequency, are accurately demodulated by digital means through the use of binary counters which are regularly reset by zero-crossing transitions in the received signals. An averaging counter arrangement driven by a free-running high-speed clock whose rate greatly exceeds the maximum data rate continuously computes the period of received signals. Counts corresponding to successive periods are transferred to a threshold counter arrangement which effectively counts up or down at further clock rates proportional to the periods of preselected mark and space frequencies toward predetermined threshold count levels which indicate transitions in the baseband data signals. The threshold counter arrangement need only count in one direction provided the counts from the averaging counter arrangement corresponding to the lower frequency-shift frequency are complemented before transfer to the threshold counter arrangement.
Inventors
- 👤 Shih Yung Tong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 19:48
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10; H04L27/14; H04L27/156; H04L27/1563
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
137 words
A frequency-shift demodulator for digital data encoded on signal waves having two or more preassigned discrete frequencies comprising free-running high-speed counter means resettable to a reference state responsive to the passage through zero of received signal waves, threshold counter means responsive to maximum count levels achieved by said high-speed counter means between said passages through zero, means for supplying to said threshold counter means selectable counting rates proportional to said preassigned discrete frequencies, means for establishing threshold count levels for the output of said threshold counter means corresponding to data transitions in said signal wave, and output means having two or more stable states responsive to the court level in said threshold counter means exceeding a particular threshold count level corresponding to a demodulated data state for selecting a predetermined counting rate for said threshold counter means.
Claim 2
Dependent Claim
137 words
A frequency-shift demodulator for digital data encoded on signal waves having two or more preassigned discrete frequencies comprising free-running high-speed counter means resettable to a reference state responsive to the passage through zero of received signal waves, threshold counter means responsive to maximum count levels achieved by said high-speed counter means between said passages through zero, means for supplying to said threshold counter means selectable counting rates proportional to said preassigned discrete frequencies, means for establishing threshold count levels for the output of said threshold counter means corresponding to data transitions in said signal wave, and output means having two or more stable states responsive to the court level in said threshold counter means exceeding a particular threshold count level corresponding to a demodulated data state for selecting a predetermined counting rate for said threshold counter means.
Claim 3
Dependent Claim
14 words
The frequency-shift demodulator defined in claim 1 in which said digital data is binary.
Claim 4
Dependent Claim
21 words
The frequency-shift demodulator defined in claim 1 in which signal waves are differentiated to establish the instants of passage through zero.
Claim 5
Dependent Claim
37 words
The frequency-shift demodulator defined in claim 1 in which said high-speed counter is reset to a reference state responsive to the passage of said received signal waves through zero in directions of both increasing and decreasing amplitude.
Claim 6
Dependent Claim
33 words
The frequency-shift demodulator defined in claim 1 in which said high-speed counter is reset to a reference state responsive to the passages through zero of said received signal in one preselected direction only.
Claim 7
Dependent Claim
154 words
A frequency-shift demodulator for binary data encoded by preassigned mark and space frequencies comprising differentiating means responsive to zero crossings in a received frequency-shift signaling wave, free-running high-speed clock means, means resettable responsive to zero crossings detected by said differentiating means for storing maximum count levels achieved by said clock means between zero crossings in said signal wave, threshold counter means having selectable counting rates proportional to respective mark and space frequencies, means for selectively transferring maximum count levels in said storing means either directly or in complement form to said threshold counter, means for establishing threshold count levels for the output of said threshold counter corresponding to respective mark-to-space and space-to-mark transitions in said signal wave, and bistable output means responsive in the alternative to the count in said threshold counter exceeding either of said threshold levels for resetting said threshold counter and for selecting a predetermined counting rate for said threshold counter.
Claim 8
Dependent Claim
154 words
A frequency-shift demodulator for binary data encoded by preassigned mark and space frequencies comprising differentiating means responsive to zero crossings in a received frequency-shift signaling wave, free-running high-speed clock means, means resettable responsive to zero crossings detected by said differentiating means for storing maximum count levels achieved by said clock means between zero crossings in said signal wave, threshold counter means having selectable counting rates proportional to respective mark and space frequencies, means for selectively transferring maximum count levels in said storing means either directly or in complement form to said threshold counter, means for establishing threshold count levels for the output of said threshold counter corresponding to respective mark-to-space and space-to-mark transitions in said signal wave, and bistable output means responsive in the alternative to the count in said threshold counter exceeding either of said threshold levels for resetting said threshold counter and for selecting a predetermined counting rate for said threshold counter.
Claim 9
Dependent Claim
17 words
The frequency-shift demodulator defined in claim 6 in which said storing means comprising a single multistage counter.
Claim 10
Dependent Claim
45 words
The frequency-shift demodulator defined in claim 6 in which said storage means comprises a plurality of multistage counters and coincidence gating means for transferring the stored contents of each preceding counter to a succeeding counter in response to zero crossings detected by said differentiating means.
Claim 11
Dependent Claim
39 words
The frequency-shift demodulator defined in claim 6 in which said means for transferring maximum count levels from said storage means to said threshold counter comprises a plurality of exclusive-OR gates controlled by the output state of said bistable means.
Claim 12
Dependent Claim
30 words
The frequency-shift demodulator defined in claim 6 in which said means for establishing threshold count levels comprises coincidence gates having inputs connected to predetermined stages of said threshold counter means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-22 | 1979-03-24 | 1979-09-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-22 | 1983-03-24 | 1983-09-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-22 | 1987-03-24 | 1987-09-23 | $7700.00 | Window Closed / Lapsed |