Common control framing detector

Claim 2

In a time division multiplex system wherein a plurality of digital groups of time division multiplex channels are time multiplexed together on to a common transmission link, each digital group including a similar predetermined framing bit pattern; a common control framing detector comprising means including a shared recirculating memory for storing the framing pattern status of each digital group, means for updating the stored framing pattern status of each digital group in accordance with changes introduced into each of the multiplexed digital groups by the multiplex system, means for comparing the stored framing pattern status of each digital group with the framing bits of the group as the latter appears on the common transmission link and for generating an error signal when the comparison fails, means including a shared recirculating memory for maintaining an error count for each digital group, means for respectively incrementing the error count for each digital group in response to a generated error signal and for respectively decrementing the error count in the absence of an error signal, and means for producing an out-of-frame signal when the error count for a digital group reaches a predetermined threshold.

Claim 3

A common control framing detector as defined in claim 1 including means for maintaining a real-time record of the in-frame or out-of-frame status for each digital group.

Claim 4

A common control framing detector as defined in claim 2 wherein an in-frame status record of a digital group is changed to the out-of-frame status in response to said out-of-frame signal.

Claim 5

A common control framing detector as defined in claim 2 wherein the means for maintaining a real-time record comprises a shared recirculating memory.

Claim 6

A common control framing detector as defined in claim 4 wherein the shared recirculating memories comprise shift registers that are clocked in time coincidence with the appearance of the digital groups on the multiplexed transmission link.

Claim 7

A common control framing detector as defined in claim 5 wherein each of the shift registers comprises a number of cells that exceed by one the number of multiplexed digital groups.

Claim 8

A common control framing detector as defined in claim 6 wherein said error count is incremented by seven in response to an error signal and is decremented by one in the absence of an error signal.

Claim 9

A common control framing detector as defined in claim 7 including means for producing an in-frame indication when the error count for a digital group reaches a predetermined minimum.

Claim 10

A common control framing detector as defined in claim 8 including means for changing an out-of-frame status record to the in-frame status in response to said in-frame indication.

Claim 11

A time division system as defined in claim 1 wherein said system comprises a switching machine which intermittently introduces chaNges into each of the multiplexed digital groups for synchronization and reframing purposes.

Claim 12

In a time division switching machine wherein n digital groups of time division multiplexed channels are time multiplexed together on to a common bus, each digital group including a similar predetermined framing bit pattern; a common control framing detector comprising a shared recirculating memory for storing the framing pattern state of each digital group, means for continually updating the stored framing pattern state of each digital group in accordance with changes introduced into each of the multiplexed digital groups by the switching machine for synchronization and reframing purposes, framing pattern checker means coupled to the output of said shared memory for comparing the stored framing pattern state of each digital group with the framing bits of said group as the latter appears on the common multiplexed bus, said checker means serving to generate an error signal whenever the comparison fails, means including a shared recirculating memory for maintaining an error ccount for each digital group, means for respectively incrementing the error count for each digital group in response to a generated error signal and for respectively decrementing the error count in the absence of an error signal, means for producing an in-frame indication when the error count for a digital group is at a given minimum count and for producing an out-of-frame indication when the error count reaches a predetermined maximum, and means including a shared recirculating memory responsive to said in-frame and out-of-frame indications to maintain a real-time record of the in-frame or out-of-frame status for each digital group.

Claim 13

In a time division switching machine wherein n digital groups of time division multiplexed channels are time multiplexed together on to a common bus, each digital group including a similar predetermined framing bit pattern; a common control framing detector comprising a shared recirculating memory for storing the framing pattern state of each digital group, means for continually updating the stored framing pattern state of each digital group in accordance with changes introduced into each of the multiplexed digital groups by the switching machine for synchronization and reframing purposes, framing pattern checker means coupled to the output of said shared memory for comparing the stored framing pattern state of each digital group with the framing bits of said group as the latter appears on the common multiplexed bus, said checker means serving to generate an error signal whenever the comparison fails, means including a shared recirculating memory for maintaining an error ccount for each digital group, means for respectively incrementing the error count for each digital group in response to a generated error signal and for respectively decrementing the error count in the absence of an error signal, means for producing an in-frame indication when the error count for a digital group is at a given minimum count and for producing an out-of-frame indication when the error count reaches a predetermined maximum, and means including a shared recirculating memory responsive to said in-frame and out-of-frame indications to maintain a real-time record of the in-frame or out-of-frame status for each digital group.

Claim 14

In a time division switching machine as defined in claim 11, wherein said shared recirculating memories comprise shift registers which are clocked in time coincidence with the appearance of the digital groups on the multiplexed common bus, each of said shift registers having a number of tandem coupled cells that exceed by one the number n.