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US3897274A
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US
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Method of fabricating dielectrically isolated semiconductor structures
Assignee: Texas Instruments Inc
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Filing: 1973-03-12
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Granted: 1975-07-29
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Expires: 1993-03-12
Abstract
Abstract Various regions or pockets are defined within a substrate that comprises an integral body of semiconductor material. The regions extend to a surface of the substrate and are isolated one from another by dielectric layers that enclose each region, extending to the surface of the substrate around the periphery of each region. In one aspect of the invention the dielectric layer extends to the surface of the substrate at an acute angle thereto. The dielectric layer is formed using ion implantation techniques to implant selected ions to a desired depth in the substrate where they combine with the semiconductor material to form an insulating compound.
Inventors
- 👤 Robert A Stehlin
- 👤 Richard J Dexter
- 👤 Don L Kendall
- 👤 John M Pankratz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 13:20
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/208; H10P30/209; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1908; H10P95/00; H10W; H10W10/00; H10W10/10; H10W10/181; H10W74/00; H10W74/40; H10W74/43; Y; Y10; Y10S; Y10S148/00; Y10S148/085; Y10S148/106; Y10S148/118; Y10S148/145; Y10S438/00; Y10S438/973
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
97 words
A method for forming a buried dielectric isolation layer in a semiconductor body comprising the steps of: selecting a semiconductor body crystallographically oriented to expose a surface lying in a low index plane; forming a mask substantially impervious to ion radiation over said semiconductor surface; opening windows through said mask at selected locations; and directing a beam of ions to impinge upon said windows, said ions being accelerated by an energy sufficient to implant said ions in a layer a desired distance below the surface of said semiconductor material in said layer to an electrically insulating compound.
Claim 2
Independent Claim
97 words
A method for forming a buried dielectric isolation layer in a semiconductor body comprising the steps of: selecting a semiconductor body crystallographically oriented to expose a surface lying in a low index plane; forming a mask substantially impervious to ion radiation over said semiconductor surface; opening windows through said mask at selected locations; and directing a beam of ions to impinge upon said windows, said ions being accelerated by an energy sufficient to implant said ions in a layer a desired distance below the surface of said semiconductor material in said layer to an electrically insulating compound.
Claim 3
Dependent Claim
34 words
A method for forming a dielectric isolation layer as set forth in claim 1, wherein said semiconductor material is silicon and said ions are selected from the group consisting of carbon, nitrogen and oxygen.
Claim 4
Dependent Claim
23 words
A method for forming a dielectric isolation layer as set forth in claim 1, wherein said windows are formed to have bevelled walls.
Claim 5
Independent Claim
170 words
A method for forming a buried dielectric isolation layer in a semiconductor chip comprising the steps of: a. growing a relatively thin epitaxial layer over a semiconductor chip; b. directing a beam of accelerated ions over the surface of said epitaxial layer to form a dielectric layer substantially parallel to the surface of said epitaxial layer and buried within said semiconductor chip a predetermined distance under the surface of said epitaxial layer, said ions converting a portion of said semiconductor chip to an electrically insulating compound; c. forming an ion impervious mask over the surface of said substrate; d. opening windows in said mask at preselected locations; e. directing a beam of ions to impinge upon said windows to implant said ions a selectable distance into said semiconductor chip to contact said buried layer; and f. varying the acceleration energy of said ions to extend said dielectric layer to the surface of said epitaxial layer under said windows thereby forming a plurality of dielectrically isolated regions in said semiconductor chip.
Claim 6
Independent Claim
170 words
A method for forming a buried dielectric isolation layer in a semiconductor chip comprising the steps of: a. growing a relatively thin epitaxial layer over a semiconductor chip; b. directing a beam of accelerated ions over the surface of said epitaxial layer to form a dielectric layer substantially parallel to the surface of said epitaxial layer and buried within said semiconductor chip a predetermined distance under the surface of said epitaxial layer, said ions converting a portion of said semiconductor chip to an electrically insulating compound; c. forming an ion impervious mask over the surface of said substrate; d. opening windows in said mask at preselected locations; e. directing a beam of ions to impinge upon said windows to implant said ions a selectable distance into said semiconductor chip to contact said buried layer; and f. varying the acceleration energy of said ions to extend said dielectric layer to the surface of said epitaxial layer under said windows thereby forming a plurality of dielectrically isolated regions in said semiconductor chip.
Claim 7
Dependent Claim
34 words
The method for forming a dielectric isolation layer as set forth in claim 4, wherein said ions are selected from the group consisting of carbon, nitrogen and oxygen and said semiconductor material is silicon.
Claim 8
Dependent Claim
20 words
A METHOD FOR PRODUCING A DIELECTRICALLY ISOLUATED LAYER AS SET FORTH IN CLAIM 5, WHEREIN SAID WINDOWS HAVE BEVELLED WALLS.
Claim 9
Dependent Claim
42 words
A method for forming a buried dielectric isolation layer as set forth in claim 4 including the step of heating the structure subsequent to implantation of said ions to a temperature of at least 700*C to enhance formation of said insulating compound.
Claim 10
Dependent Claim
33 words
A method for forming a buried dielectric layer as set forth in claim 4 wherein the steps of implanting ions includes simultaneously heating said semiconductor chip to a temperature of at least 700*C.
Claim 11
Dependent Claim
32 words
A method for forming a buried dielectric layer as set forth in claim 4 wherein said substrate is oriented along a low index crystalline plane to enhance channeling of said implanted ions.
Claim 12
Dependent Claim
40 words
A method for forming a buried dielectric layer as set forth in claim 4 including the step of forming a high conductivity layer contacting the upper surface of said dielectric layer and extending to the surface of said semiconductor chip.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-07-28 | 1979-01-27 | 1979-07-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-07-28 | 1983-01-27 | 1983-07-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-07-28 | 1987-01-27 | 1987-07-29 | $7700.00 | Window Closed / Lapsed |